# US 12,016,251 B2 · Spin-orbit torque and spin-transfer torque magnetoresistive random-access memory stack

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- Number: US 12,016,251 B2
- Document ID: US12016251B2
- Status: Granted
- Kind: B2
- Application number: 17/445,831
- Filed: 2021-08-25
- Published: 2023-03-02
- Granted: 2024-06-18
- Earliest claimed: 2021-08-25
- Assignees: International Business Machines Corporation
- Applicants: International Business Machines Corporation
- Inventors: Heng Wu; Alexander Reznicek; Bahman Hekmatshoartabari; Ruilong Xie
- Web page: https://patentgrep.com/patent/US12016251B2

## CPC

- H10N 52/80: Constructional details
- G11C 11/161: {details concerning the memory cell structure, e.g. the layers of the ferromagnetic memory cell}
- H01F 10/3254: {the spacer being semiconducting or insulating, e.g. for spin tunnel junction [STJ]}
- H01F 10/329: {Spin-exchange coupled multilayers wherein the magnetisation of the free layer is switched by a spin-polarised current, e.g. spin torque effect}
- H10B 61/20: {comprising components having three or more electrodes, e.g. transistors}
- H10N 50/01: Manufacture or treatment
- H10N 50/10: Magnetoresistive devices
- H10N 52/00: Hall-effect devices (integrated devices or assemblies of multiple devices H10N59/00)
- H10N 52/01: Manufacture or treatment
- G11C 11/1673: {Reading or sensing circuits or methods}
- H10N 50/85: Materials of the active region
- H10N: ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- G11C: STATIC STORES (semiconductor memory devices H10B)
- H01F: MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
- H10B: ELECTRONIC MEMORY DEVICES

## Abstract

Embodiments disclosed herein include a semiconductor structure. The semiconductor structure may include a spin transfer torque (STT) magnetoresistive random access memory (MRAM) stack. The semiconductor structure may also include a spin orbit torque (SOT) MRAM stack vertically in series with the STT-MRAM. The SOT-MRAM stack may include a heavy metal spin hall effect rail configured to flip an SOT free-layer magnetic orientation in response to a horizontal signal through the heavy metal rail.

## Claims

### Claim 1

A semiconductor structure, comprising:
a spin transfer torque (STT) magnetoresistive random access memory (MRAM) stack, comprising:
an STT reference layer comprising a fixed magnetic field; and
an STT free layer configured to flip an STT magnetic orientation in response to a vertical signal through the STT reference layer and the STT free layer; and
a spin orbit torque (SOT)-MRAM stack vertically in series with the STT-MRAM comprising:
a heavy metal spin hall effect (SHE) rail configured to flip an SOT free-layer magnetic orientation in response to a horizontal signal through the heavy metal SHE rail;
an SOT reference layer different from the STT reference layer; and
an SOT free layer configured to flip the SOT free-layer magnetic orientation in response to a vertical signal through the SOT-MRAM.

### Claim 2 (depends on 1)

The semiconductor structure of claim 1, further comprising a bottom electrode vertically below the STT-MRAM stack.

### Claim 3 (depends on 2)

The semiconductor structure of claim 2, further comprising a front end of line (FEOL) layer comprising transistor devices vertically below the bottom electrode.

### Claim 4 (depends on 1)

The semiconductor structure of claim 1, wherein the heavy metal SHE rail comprises a selection from the group consisting of: platinum, tantalum, tungsten, and palladium.

### Claim 5 (depends on 1)

The semiconductor structure of claim 1, further comprising a tunnel barrier between the STT reference layer and the STT free layer.

### Claim 6 (depends on 1)

The semiconductor structure of claim 1, further comprising a tunnel barrier between the SOT reference layer and the SOT free layer.

### Claim 7 (depends on 1)

The semiconductor structure of claim 1, further comprising an encapsulation layer around the STT-MRAM stack and the SOT-MRAM stack.