# US 12,016,221 B2 · Display substrate having a display region and a non-display region surrounding the display region and method for manufacturing the same

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- Number: US 12,016,221 B2
- Document ID: US12016221B2
- Status: Granted
- Kind: B2
- Application number: 17/298,439
- Filed: 2020-09-02
- Published: 2022-10-06
- Granted: 2024-06-18
- Earliest claimed: 2020-09-02
- Assignees: Chengdu Boe Optoelectronics Technology Co., Ltd.; Boe Technology Group Co., Ltd.
- Applicants: Chengdu Boe Optoelectronics Technology Co., Ltd.; Boe Technology Group Co., Ltd.
- Inventors: Jie Dai; Pengfei Yu; Siyu Wang; Shun Zhang; Yi Zhang; Tingliang Liu; Sen Du; Li Song
- Web page: https://patentgrep.com/patent/US12016221B2

## CPC

- H10K 59/124: Insulating layers formed between TFT elements and OLED elements
- H10K 59/131: Interconnections, e.g. wiring lines or terminals
- H10K 59/87: {Passivation; Containers; Encapsulations}
- H10K 59/873: {Encapsulations}
- H10K 59/1201: {Manufacture or treatment}
- H10K 2102/311: {Flexible OLED}
- H10K: ORGANIC ELECTRIC SOLID-STATE DEVICES

## Abstract

A display substrate, a method for manufacturing the display substrate and a display device are provided. The display substrate includes a display region and a non-display region surrounding the display region. The display substrate further includes: an organic functional layer including a first portion located in the display region and a second portion located in the non-display region. The second portion is provided with at least one isolation groove, and is partitioned into at least two separate sub-portions by the at least one isolation groove, and the at least two sub-portions are arranged sequentially along a first direction from the display region to a boundary of the display substrate.

## Claims

### Claim 1

A display substrate, comprising: a display region and a non-display region surrounding the display region;
wherein the display substrate further comprises:
an organic functional layer comprising a first portion located in the display region and a second portion located in the non-display region, wherein the second portion is provided with at least one isolation groove, and is partitioned into at least two separate sub-portions by the at least one isolation groove, and the at least two sub-portions are arranged sequentially along a first direction from the display region to a boundary of the display substrate;
wherein the second portion is provided with a first isolation groove and a second isolation groove, and the first isolation groove is located between the display region and the second isolation groove;
the second portion is partitioned by the first isolation groove and the second isolation groove into a first sub-portion, a second sub-portion and a third sub-portion, and the first sub-portion, the second sub-portion and the third sub-portion are separate from each other, and are sequentially arranged in a spaced manner along the first direction;
wherein the display substrate further comprises:
a circuit structure located in the non-display region, wherein an orthographic projection of the circuit structure onto a base substrate of the display substrate is covered by an orthographic projection of the second sub-portion onto the base substrate;
a first signal line structure located in the non-display region, wherein an orthographic projection of the first signal line structure onto the base substrate is covered by an orthographic projection of the first sub-portion onto the base substrate;
a second signal line structure located in the non-display region, wherein an orthographic projection of the second signal line structure onto the base substrate is covered by an orthographic projection of the third sub-portion onto the base substrate;
wherein along the first direction, both a width of the first sub-portion and a width of the third sub-portion are smaller than a width of the second sub-portion.

### Claim 2 (depends on 1)

The display substrate according to claim 1, wherein the at least one isolation groove surrounds the display region, each of the at least two sub-portions surrounds the display region, and the at least two sub-portions are arranged in a manner in which an outer sub-portion surrounds an inner sub-portion.

### Claim 3 (depends on 1)

The display substrate according to claim 1, wherein the circuit structure comprises a gate driver circuit, a test circuit, and a multiplexing circuit;
the first signal line structure comprises a power signal line; and
the second signal line structure comprises a test signal line and a clock signal line.

### Claim 4 (depends on 1)

The display substrate according to claim 1, wherein the organic functional layer comprises a first planarization layer, a second planarization layer and/or a pixel definition layer.

### Claim 5 (depends on 1)

The display substrate according to claim 1, further comprising an electrically conductive functional pattern located in the non-display region, wherein an orthographic projection of the at least one isolation groove onto a base substrate of the display substrate does not overlap an orthographic projection of the electrically conductive functional pattern onto the base substrate.

### Claim 6 (depends on 1)

The display substrate according to claim 1, further comprising an inorganic functional layer located in the non-display region, wherein an orthographic projection of the at least one isolation groove onto a base substrate of the display substrate overlaps an orthographic projection of the inorganic functional layer onto the base substrate.

### Claim 7

A display device, comprising a display substrate, wherein the display substrate comprises: a display region and a non-display region surrounding the display region;
the display substrate further comprises:
an organic functional layer comprising a first portion located in the display region and a second portion located in the non-display region, wherein the second portion is provided with at least one isolation groove, and is partitioned into at least two separate sub-portions by the at least one isolation groove, and the at least two sub-portions are arranged sequentially along a first direction from the display region to a boundary of the display substrate;
wherein the second portion is provided with a first isolation groove and a second isolation groove, and the first isolation groove is located between the display region and the second isolation groove;
the second portion is partitioned by the first isolation groove and the second isolation groove into a first sub-portion, a second sub-portion and a third sub-portion, and the first sub-portion, the second sub-portion and the third sub-portion are separate from each other, and are sequentially arranged in a spaced manner along the first direction;
wherein the display substrate further comprises:
a circuit structure located in the non-display region, wherein an orthographic projection of the circuit structure onto a base substrate of the display substrate is covered by an orthographic projection of the second sub-portion onto the base substrate;
a first signal line structure located in the non-display region, wherein an orthographic projection of the first signal line structure onto the base substrate is covered by an orthographic projection of the first sub-portion onto the base substrate;
a second signal line structure located in the non-display region, wherein an orthographic projection of the second signal line structure onto the base substrate is covered by an orthographic projection of the third sub-portion onto the base substrate;
wherein along the first direction, both a width of the first sub-portion and a width of the third sub-portion are smaller than a width of the second sub-portion.

### Claim 8 (depends on 7)

The display device according to claim 7, wherein the display device comprises a circular watch.

### Claim 9 (depends on 7)

The display device according to claim 7, wherein the at least one isolation groove surrounds the display region, each of the at least two sub-portions surrounds the display region, and the at least two sub-portions are arranged in a manner in which an outer sub-portion surrounds an inner sub-portion.

### Claim 10 (depends on 7)

The display device according to claim 7, wherein the circuit structure comprises a gate driver circuit, a test circuit, and a multiplexing circuit;
the first signal line structure comprises a power signal line; and
the second signal line structure comprises a test signal line and a clock signal line.

### Claim 11 (depends on 7)

The display device according to claim 7, wherein the organic functional layer comprises a first planarization layer, a second planarization layer and/or a pixel definition layer.

### Claim 12 (depends on 7)

The display device according to claim 7, further comprising an electrically conductive functional pattern located in the non-display region, wherein an orthographic projection of the at least one isolation groove onto a base substrate of the display substrate does not overlap an orthographic projection of the electrically conductive functional pattern onto the base substrate.

### Claim 13 (depends on 7)

The display device according to claim 7, further comprising an inorganic functional layer located in the non-display region, wherein an orthographic projection of the at least one isolation groove onto a base substrate of the display substrate overlaps an orthographic projection of the inorganic functional layer onto the base substrate.

### Claim 14

A method for manufacturing a display substrate, wherein the display substrate comprises a display region and a non-display region surrounding the display region, and the method comprises:
forming an organic functional layer, wherein the organic functional layer comprises a first portion located in the display region and a second portion located in the non-display region, the second portion is provided with at least one isolation groove, and is partitioned into at least two separate sub-portions by the at least one isolation groove, and the at least two sub-portions are arranged sequentially along a first direction from the display region to a boundary of the display substrate;
wherein the second portion is provided with a first isolation groove and a second isolation groove, and the first isolation groove is located between the display region and the second isolation groove;
the second portion is partitioned by the first isolation groove and the second isolation groove into a first sub-portion, a second sub-portion and a third sub-portion, and the first sub-portion, the second sub-portion and the third sub-portion are separate from each other, and are sequentially arranged in a spaced manner along the first direction;
wherein the display substrate further comprises:
a circuit structure located in the non-display region, wherein an orthographic projection of the circuit structure onto a base substrate of the display substrate is covered by an orthographic projection of the second sub-portion onto the base substrate;
a first signal line structure located in the non-display region, wherein an orthographic projection of the first signal line structure onto the base substrate is covered by an orthographic projection of the first sub-portion onto the base substrate;
a second signal line structure located in the non-display region, wherein an orthographic projection of the second signal line structure onto the base substrate is covered by an orthographic projection of the third sub-portion onto the base substrate;
wherein along the first direction, both a width of the first sub-portion and a width of the third sub-portion are smaller than a width of the second sub-portion.

### Claim 15 (depends on 14)

The method for manufacturing the display substrate according to claim 14, wherein the organic functional layer comprises a planarization layer provided with a via-hole structure, and the via-hole structure is configured to connect an anode pattern to a corresponding sub-pixel driver circuit in the display substrate,
forming the at least one isolation groove in the organic functional layer specifically comprises: forming the via-hole structure and the at least one isolation groove simultaneously in one patterning process.
