# US 12,016,185 B1 · Planar and trench capacitors for logic and memory applications

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- Number: US 12,016,185 B1
- Document ID: US12016185B1
- Status: Granted
- Kind: B1
- Application number: 17/552,293
- Filed: 2021-12-15
- Granted: 2024-06-18
- Earliest claimed: 2021-12-14
- Assignees: Kepler Computing Inc.
- Applicants: Kepler Computing Inc.
- Inventors: Somilkumar J. Rathi; Noriyuki Sato; Niloy Mukherjee; Rajeev Kumar Dokania; Amrita Mathuriya; Tanay Gosavi; Pratyush Pandey; Jason Y. Wu; Sasikanth Manipatruni
- Web page: https://patentgrep.com/patent/US12016185B1

## CPC

- H10D 1/042: {using deposition processes to form electrode extensions}
- H10B 51/30: characterised by the memory core region
- H10B 53/30: characterised by the memory core region
- H10D 1/043: {using patterning processes to form electrode extensions, e.g. etching}
- H10D 1/665: {Trench conductor-insulator-semiconductor capacitors, e.g. trench MOS capacitors}
- H10D 1/682: {having dielectrics comprising perovskite structures}
- H10D 1/688: {comprising barrier layers to prevent diffusion of hydrogen or oxygen}
- H10D 1/694: {comprising noble metals or noble metal oxides}
- H10D 1/696: {comprising multiple layers, e.g. comprising a barrier layer and a metal layer (barrier layers to prevent diffusion of hydrogen or oxygen in perovskite based capacitors H10D1/688)}
- H10D 1/716: {having vertical extensions}
- H10P 52/403: {of conductive or resistive materials}
- H10W 20/033: {in openings in dielectrics}
- H10W 20/046: {the barrier, adhesion or liner layers being associated with interconnections of capacitors}
- H10W 20/056: {by filling conductive material into holes, grooves or trenches}
- H10W 20/077: {on sidewalls or on top surfaces of conductors (H10W20/076 takes precedence)}
- H10W 20/42: Vias, e.g. via plugs
- H10W 20/496: {Capacitor integral with wiring layers}
- G11C 11/221: {using ferroelectric capacitors}
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10B: ELECTRONIC MEMORY DEVICES
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- G11C: STATIC STORES (semiconductor memory devices H10B)

## Abstract

A device includes, in a first region, a first conductive interconnect, an electrode structure on the first conductive interconnect, where the electrode structure includes a first conductive hydrogen barrier layer and a first conductive fill material. A trench capacitor including a ferroelectric material or a paraelectric material is on the electrode structure. A second dielectric includes an amorphous, greater than 90% film density hydrogen barrier material laterally surrounds the memory device. A via electrode including a second conductive hydrogen barrier material is on at least a portion of the memory device. A second region includes a conductive interconnect structure embedded within a less than 90% film density dielectric material.

## Claims

### Claim 1

A device comprising:
a first electrode structure and a second electrode structure within an etch stop layer comprising an insulator, the first electrode structure laterally separated from the second electrode structure, wherein the first electrode structure and the second electrode structure comprise:
a first conductive hydrogen barrier layer, and
a first conductive fill material on the first conductive hydrogen barrier layer;
a planar capacitor comprising a first ferroelectric material or a first paraelectric material on least a portion of the first electrode structure;
an encapsulation layer on the planar capacitor,
a dielectric on the encapsulation layer;
a via electrode on at least a portion of the planar capacitor, the via electrode comprising:
a second conductive hydrogen barrier layer; and
a second conductive fill material on the second conductive hydrogen barrier layer,
a trench within the dielectric, the trench on the second electrode structure;
a spacer along a sidewall of the trench; and
a non-planar capacitor within the trench, the non-planar capacitor comprising:
a bottom electrode that is substantially conformal along a base of the trench and the spacer, wherein the bottom electrode is in contact with the second electrode structure;
a dielectric layer substantially conformal to the bottom electrode, the dielectric layer comprising a second ferroelectric material or a second paraelectric material; and
a top electrode in contact with the dielectric layer.

### Claim 2 (depends on 1)

The device of claim 1, wherein the first ferroelectric material and the second ferroelectric material comprises one of:
bismuth ferrite (BFO) with a first doping material, wherein the first doping material is one of lanthanum or elements from lanthanide series of periodic table;
lead zirconium titanate (PZT) or PZT with a second doping material, wherein the second doping material is one of La or Nb;
a relaxor ferroelectric material which includes one of: lead magnesium niobate (PMN), lead magnesium niobate-lead titanate (PMN-PT), lead lanthanum zirconate titanate (PLZT), lead scandium niobate (PSN), barium titanium-bismuth zinc niobium tantalum (BT-BZNT), or barium titanium-barium strontium titanium (BT-BST);
a perovskite material which includes one of: BaTiO3, PbTiO3, KNbO3, or NaTaO3;
a hexagonal ferroelectric which includes one of: YMnO3 or LuFeO3; a hexagonal ferroelectric of a type h-RMnO3, where R is a rare earth element which includes one of: cerium (Ce), dysprosium (Dy), erbium (Er), europium (Eu), gadolinium (Gd), holmium (Ho), lanthanum (La), lutetium (Lu), neodymium (Nd), praseodymium (Pr), promethium (Pm), samarium (Sm), scandium (Sc), terbium (Tb), thulium (Tm), ytterbium (Yb), or yttrium (Y);
Hafnium (Hf), Zirconium (Zr), Aluminum (Al), Silicon (Si), their oxides or their alloyed oxides;
Hf(1-x)ExOy, where E includes one of Al, Ca, Ce, Dy, Er, Gd, Ge, La, Sc, Si, Sr, Sn, Zr, or Y where x and y are first and second fractions, respectively;
Al(1-x)Sc(x)N, Ga(1-x)Sc(x)N, Al(1-x)Y(x)N or Al(1-x-y)Mg(x)Nb(y)N, where x and y are third and fourth fractions, respectively;
HfO2 doped with one of: Al, Ca, Ce, Dy, Er, Gd, Ge, La, Sc, Si, Sr, Sn, or Y;
niobate type compounds LiNbO3, LiTaO3, lithium iron tantalum oxy fluoride, barium strontium niobate, sodium barium niobate, or potassium strontium niobate; or
an improper ferroelectric material which includes one of: [PTO/STO]n or [LAO/STO]n, where ‘n’ is between 1 and 100; or
wherein the first paraelectric material and the second paraelectric material comprise SrTiO3, TiOa with Ba and Sr, HfZrO2, Hf—Si—O, La-substituted PbTiO3, or a PMN-PT based relaxor ferroelectrics.

### Claim 3 (depends on 2)

The device of claim 2, wherein the planar capacitor comprises the first paraelectric material and the non-planar capacitor comprises the second ferroelectric material, or the planar capacitor comprises the first ferroelectric material and the non-planar capacitor comprises the second paraelectric material.

### Claim 4 (depends on 2)

The device of claim 2, wherein the planar capacitor comprises the first ferroelectric material and the non-planar capacitor comprises the second ferroelectric material.

### Claim 5 (depends on 2)

The device of claim 2, wherein the planar capacitor comprises the first paraelectric material and the non-planar capacitor comprises the second paraelectric material.

### Claim 6 (depends on 2)

The device of claim 2, wherein the planar capacitor comprises a first vertical thickness and the non-planar capacitor comprises a second vertical thickness, and wherein the second vertical thickness is at least two times greater than the first vertical thickness.

### Claim 7 (depends on 1)

The device of claim 1, wherein the encapsulation layer is further in contact with the spacer.

### Claim 8 (depends on 1)

The device of claim 1, wherein the encapsulation layer comprises SiN, carbon doped SiN, AlxOy, HfOx, AlSiOx, ZrOx, TiOx, AlSiOX, HfSiOX, TaSiOX, AlN, ZrN, or HfN, wherein the spacer comprises SiN, carbon doped SiN, AlxOy, HfOx, AlSiOx, ZrOx, TiOx, AlSiOx, HfSiOx, TaSiOx, AlN, ZrN, or HfN, and wherein the encapsulation layer and the spacer include a same material.

### Claim 9 (depends on 1)

The device of claim 1, wherein the encapsulation layer comprises SiN, carbon doped SiN, AlxOy, HfOx, AlSiOx, ZrOx, TiOx, AlSiOX, HfSiOX, TaSiOX, AlN, ZrN, or HfN, wherein the spacer comprises SiN, carbon doped SiN, AlxOy, HfOx, AlSiOx, ZrOx, TiOx, AlSiOx, HfSiOx, TaSiOx, AlN, ZrN, or HfN, and wherein the encapsulation layer and the spacer include different materials.

### Claim 10 (depends on 1)

The device of claim 1, wherein the dielectric is an amorphous, greater than 90% film density hydrogen barrier material comprising AlxOy, HfOx, AlSiOx, ZrOx, TiOx, AlSiOX, HfSiOX, TaSiOX, AlN, ZrN, or HfN.

### Claim 11 (depends on 1)

The device of claim 1, wherein the dielectric comprises a less than 90% film density material, and wherein the less than 90% film density material comprises one of: SiO2, SiOC, SiC, or SiO2 doped with F.

### Claim 12 (depends on 1)

The device of claim 1, wherein the encapsulation layer and the spacer comprise a substantially similar thickness.

### Claim 13 (depends on 1)

The device of claim 1, wherein the first conductive hydrogen barrier layer and the second conductive hydrogen barrier layer comprise TiAlN with greater than 30 atomic percent AlN, TaN with greater than 30 atomic percent N2, TiSiN with greater than 20 atomic percent SiN, TaC, TiC, WC, WN, carbonitrides of Ta, Ti, or W, TiO, Ti2O, WO3, SnO2, ITO, IGZO, zinc oxide, or METGLAS series of alloys.

### Claim 14

A device comprising:
a first electrode structure and a second electrode structure within an etch stop layer comprising an insulator, the first electrode structure laterally separated from the second electrode structure, wherein the first electrode structure and the second electrode structure comprise:
a first conductive hydrogen barrier layer, and
a first conductive fill material on the first conductive hydrogen barrier layer;
a planar capacitor comprising a first ferroelectric material or a first paraelectric material on least a portion of the first electrode structure;
a dielectric comprising an amorphous, greater than 90% film density hydrogen barrier material on the planar capacitor and on the etch stop layer;
a via electrode on at least a portion of the planar capacitor, the via electrode comprising:
a second conductive hydrogen barrier layer; and
a second conductive fill material on the second conductive hydrogen barrier layer,
a trench within the dielectric, the trench on the second electrode structure; and
a non-planar cylindrical capacitor within the trench, the non-planar cylindrical capacitor comprising:
a bottom electrode that is substantially conformal along a base and sidewall of the trench, wherein the bottom electrode is in contact with the second electrode structure;
a dielectric layer substantially conformal to the bottom electrode, the dielectric layer comprising a second ferroelectric material or a second paraelectric material; and
a top electrode in contact with the dielectric layer.

### Claim 15 (depends on 14)

The device of claim 14, wherein the dielectric is an amorphous, greater than 90% film density hydrogen barrier material comprising AlxOy, HfOx, AlSiOx, ZrOx, TiOx, AlSiOx, HfSiOx, TaSiOx, AlN, ZrN, or HfN.

### Claim 16 (depends on 14)

The device of claim 14, wherein the non-planar cylindrical capacitor is tapered.

### Claim 17 (depends on 14)

The device of claim 14, wherein the first ferroelectric material and the second ferroelectric material comprises one of:
bismuth ferrite (BFO) with a first doping material, wherein the first doping material is one of lanthanum or elements from lanthanide series of periodic table;
lead zirconium titanate (PZT) or PZT with a second doping material, wherein the second doping material is one of La or Nb;
a relaxor ferroelectric material which includes one of: lead magnesium niobate (PMN), lead magnesium niobate-lead titanate (PMN-PT), lead lanthanum zirconate titanate (PLZT), lead scandium niobate (PSN), barium titanium-bismuth zinc niobium tantalum (BT-BZNT), or barium titanium-barium strontium titanium (BT-BST);
a perovskite material which includes one of: BaTiO3, PbTiO3, KNbO3, or NaTaO3;
a hexagonal ferroelectric which includes one of: YMnO3 or LuFeO3;
a hexagonal ferroelectric of a type h-RMnO3, where R is a rare earth element which includes one of: cerium (Ce), dysprosium (Dy), erbium (Er), europium (Eu), gadolinium (Gd), holmium (Ho), lanthanum (La), lutetium (Lu), neodymium (Nd), praseodymium (Pr), promethium (Pm), samarium (Sm), scandium (Sc), terbium (Tb), thulium (Tm), ytterbium (Yb), or yttrium (Y);
Hafnium (Hf), Zirconium (Zr), Aluminum (Al), Silicon (Si), their oxides or their alloyed oxides;
Hf1-xExOy, where E includes one of Al, Ca, Ce, Dy, Er, Gd, Ge, La, Sc, Si, Sr, Sn, Zr, or Y, where x and y are first and second fractions, respectively;
Al(1-x)Sc(x)N, Ga(1-x)Sc(x)N, Al(1-x)Y(x)N or Al(1-x-y)Mg(x)Nb(y)N, where x and y third and fourth fractions, respectively;
HfO2 doped with one of: Al, Ca, Ce, Dy, Er, Gd, Ge, La, Sc, Si, Sr, Sn, or Y;
niobate type compounds LiNbO3, LiTaO3, lithium iron tantalum oxy fluoride, barium strontium niobate, sodium barium niobate, or potassium strontium niobate; or
an improper ferroelectric material which includes one of: [PTO/STO]n or [LAO/STO]n, where ‘n’ is between 1 to 100; or
wherein the first paraelectric material and the second paraelectric material comprise SrTiO3, TiO3 with Ba and Sr, HfZrO2, Hf—Si—O, La-substituted PbTiO3, or a PMN-PT based relaxor ferroelectric.

### Claim 18

A device comprising:
a first electrode structure and a second electrode structure within an etch stop layer comprising an insulator, the first electrode structure laterally separated from the second electrode structure, wherein the first electrode structure and the second electrode structure comprise:
a first conductive hydrogen barrier layer, and
a first conductive fill material on the first conductive hydrogen barrier layer;
a planar capacitor comprising a first ferroelectric material or a first paraelectric material on least a portion of the first electrode structure;
an encapsulation layer on the planar capacitor,
a dielectric on the encapsulation layer the dielectric comprising an amorphous, greater than 90% film density hydrogen barrier material;
a via electrode on at least a portion of the planar capacitor, the via electrode comprising:
a second conductive hydrogen barrier layer; and
a second conductive fill material on the second conductive hydrogen barrier layer,
a trench within the dielectric, the trench on the second electrode structure; and
a non-planar capacitor within the trench, the non-planar capacitor comprising:
a bottom electrode that is substantially conformal along a base and sidewall of the trench, wherein the bottom electrode is in contact with the second electrode structure and the encapsulation layer;
a dielectric layer substantially conformal to the bottom electrode, the dielectric layer comprising a second ferroelectric material or a second paraelectric material; and
a top electrode in contact with the dielectric layer.

### Claim 19 (depends on 18)

The device of claim 18, wherein the encapsulation layer comprises SiN and wherein the encapsulation layer is further adjacent to the bottom electrode.

### Claim 20 (depends on 18)

The device of claim 18, wherein the first conductive hydrogen barrier layer and the second conductive hydrogen barrier layer comprise different materials, and wherein the first conductive hydrogen barrier layer and the second conductive hydrogen barrier layer comprise a thickness of least 1 nm.