# US 12,016,114 B2 · Setting the impedance of signal traces of a circuit board using a reference trace

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- Number: US 12,016,114 B2
- Document ID: US12016114B2
- Status: Granted
- Kind: B2
- Application number: 18/119,711
- Filed: 2023-03-09
- Published: 2023-07-06
- Granted: 2024-06-18
- Earliest claimed: 2020-01-23
- Assignees: Super Micro Computer, Inc.
- Applicants: Super Micro Computer, Inc.
- Inventors: Manhtien V. Phan; Mau-Lin Chou; Chih-Hao Lee
- Web page: https://patentgrep.com/patent/US12016114B2

## CPC

- H05K 1/0253: {Impedance adaptations of transmission lines by special lay-out of power planes, e.g. providing openings (H05K1/0251 takes precedence)}
- H05K 1/0298: {Multilayer circuits}
- H05K 1/117: {Pads along the edge of rigid circuit boards, e.g. for pluggable connectors}
- H05K 2201/093: Layout of power planes, ground planes or power supply conductors, e.g. having special clearance holes therein
- H05K 2201/09709: Staggered pads, lands or terminals; Parallel conductors in different planes
- H05K: PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS

## Abstract

A circuit board has an edge connector with signal traces. The signal traces are formed on a dielectric layer of the circuit board. A reference trace is formed within the dielectric layer or on another surface of the dielectric layer. Parameters of the reference trace are adjusted to set an impedance of a single-ended signal trace or a differential impedance of two adjacent signal traces.

## Claims

### Claim 1

A circuit board comprising:
a dielectric layer;
a first contact finger and a second contact finger that are on an edge connector of the circuit board, the first and second contact fingers being on a first surface of the dielectric layer and configured to carry a differential signal;
a reference plane that is on a second surface of the dielectric layer; and
a reference trace that is within the dielectric layer, the reference trace being directly under and between the first and second contact fingers, the reference trace being configured to set a differential impedance of the first and second contact fingers,
wherein the reference plane, the reference trace, the first contact finger, and the second contact finger each comprises a metal.

### Claim 2 (depends on 1)

The circuit board of claim 1, wherein the reference plane is between the dielectric layer and another layer of the circuit board.

### Claim 3 (depends on 1)

The circuit board of claim 1, wherein the differential impedance of the first and second contact fingers is set to about 85 ohms.

### Claim 4 (depends on 1)

The circuit board of claim 1, wherein the reference trace has a width that is narrower than a spanning distance between outer side perimeters of the first contact finger and the second contact finger.

### Claim 5 (depends on 1)

The circuit board of claim 1, wherein the reference traces comprises copper.

### Claim 6 (depends on 1)

The circuit board of claim 1, wherein the edge connector includes a notch.

### Claim 7 (depends on 1)

The circuit board of claim 1, wherein the reference trace has a first portion that is in parallel with the first and second contact fingers and a second portion that is perpendicular to the first portion.

### Claim 8 (depends on 1)

The circuit board of claim 1, wherein the first and second contact fingers comprise gold.