# US 12,015,862 B2 · Image sensor having pixels with isolated floating diffusions

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- Number: US 12,015,862 B2
- Document ID: US12015862B2
- Status: Granted
- Kind: B2
- Application number: 17/058,506
- Filed: 2019-05-24
- Published: 2021-07-01
- Granted: 2024-06-18
- Earliest claimed: 2018-05-24
- Assignees: Gigajot Technology, Inc.
- Applicants: Gigajot Technology, Inc.
- Inventors: Jiaju Ma; Saleh Masoodian
- Web page: https://patentgrep.com/patent/US12015862B2

## CPC

- H04N 25/59: by controlling the amount of charge storable in the pixel, e.g. modification of the charge conversion ratio of the floating node capacitance
- H10F 39/807: {Pixel isolation structures}
- H03F 3/45475: {using IC blocks as the active amplifying circuit}
- H03F 3/70: Charge amplifiers
- H04N 25/616: involving a correlated sampling function, e.g. correlated double sampling [CDS] or triple sampling
- H04N 25/65: applied to reset noise, e.g. KTC noise related to CMOS structures by techniques other than CDS
- H04N 25/77: Pixel circuitry, e.g. memories, A/D converters, pixel amplifiers, shared circuits or shared components
- H04N 25/778: comprising amplifiers shared between a plurality of pixels, i.e. at least one part of the amplifier must be on the sensor array itself
- H04N 25/78: Readout circuits for addressed sensors, e.g. output amplifiers or A/D converters
- H10F 39/8033: {Photosensitive area}
- H10F 39/8037: {the integrated elements comprising a transistor}
- H10F 39/80377: {characterised by the channel of the transistor, e.g. channel having a doping gradient}
- H10F 99/00: Subject matter not provided for in other groups of this subclass
- H03F 2203/45512: the FBC comprising one or more capacitors, not being switched capacitors, and being coupled between the LC and the IC
- H04N: PICTORIAL COMMUNICATION, e.g. TELEVISION
- H10F: INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
- H03F: AMPLIFIERS

## Abstract

According to some embodiments, an image sensor pixel includes a floating diffusion, a transistor gate configured to transfer charge with respect to the floating diffusion, and a doped pinning region disposed between the floating diffusion and the transistor gate, to reduce or eliminate the effective capacitive coupling between the floating diffusion and the transistor gate. The transistor gate may be an in-pixel transfer gate configured to selectively transfer photocharge from an in-pixel charge accumulation region to the floating diffusion. Alternatively, or additionally, the transistor gate may be an in-pixel reset gate configured to selectively reset the electrostatic potential of the floating diffusion.

## Claims

### Claim 1

An image sensor pixel formed in a semiconductor substrate, the image sensor pixel comprising:
a photoconversion device that generates photocharge in response to at least one incident photon;
a charge storage region to which photocharge of a first conductivity type generated in said photoconversion device is selectively transferred, wherein the charge storage region is doped with a first dopant type providing conductivity corresponding to the first conductivity type, and wherein the charge storage region includes a heavily doped region of the first dopant type;
a transistor gate configured to selectively cause photocharge transfer with respect to the charge storage region; and
a doped pinning region disposed between the charge storage region and the transistor gate, wherein the doped pinning region has a second dopant type opposite to the first dopant type of the charge storage region, the doped pinning region being a heavily doped region of the second dopant type, and wherein the doped pinning region is spaced away from the heavily doped region of the first dopant type by an intervening region of the second dopant type.

### Claim 2 (depends on 1)

The image sensor pixel according to claim 1, wherein the transistor gate is a transfer gate that is configured to selectively transfer photocharge from said photoconversion device to said charge storage region.

### Claim 3 (depends on 2)

The image sensor pixel according to claim 2, wherein said charge storage region is a floating diffusion region.

### Claim 4 (depends on 3)

The image sensor pixel according to claim 3, wherein said floating diffusion region comprises an n-type doped region, and wherein said doped pinning region is a p+ doped region that forms a p+/n junction with said n-type doped region of the floating diffusion region.

### Claim 5 (depends on 4)

The image sensor pixel according to claim 4, wherein the floating diffusion region includes an n+ doped region formed in said n-type doped region.

### Claim 6 (depends on 5)

The image sensor pixel according to claim 5, wherein the n+ doped region and the p+ doped region are separated by a portion of the n-type doped region.

### Claim 7 (depends on 4)

The image sensor pixel according to claim 4, wherein the p+ doped region is disposed at or near the semiconductor region underlying the edge of the transfer gate nearest the floating diffusion so as to isolate the floating diffusion from the transfer gate.

### Claim 8 (depends on 4)

The image sensor pixel according to claim 4, wherein the p+ doped region is configured such that it will not be fully depleted when the transfer transistor gate is pulsed.

### Claim 9 (depends on 4)

The image sensor pixel according to claim 4, wherein the n doped region is configured to surround the p+ doped region and extend toward the channel of the transfer gate so as to create a charge transfer path underneath the p+ doped region when the transfer gate is pulsed ON, such that the transfer gate is capable of selectively causing charge transfer from the photoconversion device to the floating diffusion region.

### Claim 10 (depends on 8)

The image sensor pixel according to claim 8, wherein the n-type doped region is configured to conduct photocharge when the transfer gate is ON and to be fully depleted when the transfer gate is OFF.

### Claim 11 (depends on 1)

The image sensor pixel according to claim 1, wherein the transistor gate is a reset gate that is configured to selectively reset the electrostatic potential of the charge storage region while transferring any photocharge out of the charge storage region.

### Claim 12

An image sensor pixel, comprising:
a semiconductor substrate;
a floating diffusion region that includes a first doped region of a first dopant type and doped pinning region of an opposite dopant type formed at least partially within said first doped region, wherein a portion of the doped pinning region extends laterally outside of the floating diffusion region into a portion of the substrate having the same doping type as the doped pinning region; and
a gate configured to selectively cause charge transfer with respect to the floating diffusion.

### Claim 13 (depends on 12)

The image sensor pixel according to claim 12, further comprising a photosensitive element formed in the semiconductor substrate, and wherein the gate is coupled between the photosensitive element and the floating diffusion region and configured to selectively transfer charge from the photosensitive element to the floating diffusion region.

### Claim 14 (depends on 12)

The image sensor pixel according to claim 12, further comprising a drain region formed in the semiconductor substrate and configured to be coupled to a voltage supply, and wherein the gate is coupled between the drain region element and the floating diffusion region and configured to selectively transfer charge from the floating diffusion to the drain region.

### Claim 15 (depends on 12)

The image sensor pixel according to claim 12, wherein the doped pinning region is configured to effectively pin the potential at a surface region of the semiconductor at one end of the gate.

### Claim 16 (depends on 12)

The image sensor pixel according to claim 12, wherein the first doped region has a first depth, and wherein the floating diffusion includes a second doping region of the first type formed within the first doping region at a second depth less than the first depth.

### Claim 17 (depends on 12)

The image sensor pixel according to claim 12, wherein the portion of the doped pinning region that extends laterally outside of the floating diffusion region into the portion of the substrate is conductively coupled to a pinning potential.

### Claim 18 (depends on 1)

The image sensor pixel according to claim 1, wherein the charge storage region is an n-type doped region, and wherein the heavily doped region of the first dopant type is an n+ doped region formed in the n-type doped region.

### Claim 19 (depends on 18)

The image sensor pixel according to claim 18, wherein the doped pinning region is a p+ doped region, and wherein the intervening region is a p-type doped region.

### Claim 20

An image sensor pixel formed in a semiconductor substrate, the image sensor pixel comprising:
a photoconversion device that generates photocharge in response to at least one incident photon;
a charge storage region to which photocharge of a first conductivity type generated in said photoconversion device is selectively transferred, wherein the charge storage region is doped with a first dopant type providing conductivity corresponding to the first conductivity type;
a transistor gate configured to selectively cause photocharge transfer with respect to the charge storage region; and
a doped pinning region disposed between the charge storage region and the transistor gate, wherein the doped pinning region has a second dopant type opposite to the first dopant type of the charge storage region, and is conductively coupled to a pinning potential, and wherein a portion of the doped pinning region extends laterally outside of the charge storage region into a portion of the substrate having the same doping type as the doped pinning region.