# US 12,015,381 B2 · Methods and apparatus for driver calibration

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- Number: US 12,015,381 B2
- Document ID: US12015381B2
- Status: Granted
- Kind: B2
- Application number: 18/450,123
- Filed: 2023-08-15
- Published: 2023-11-30
- Granted: 2024-06-18
- Earliest claimed: 2018-06-07
- Assignees: Semiconductor Components Industries, LLC
- Applicants: Semiconductor Components Industries, LLC
- Inventors: Seiji Takeuchi
- Web page: https://patentgrep.com/patent/US12015381B2

## CPC

- H03F 1/30: Modifications of amplifiers to reduce influence of variations of temperature or supply voltage {or other physical parameters (in differential amplifiers H03F3/45479)}
- G03B 3/10: Power-operated focusing
- G03B 13/36: Autofocus systems
- G05F 3/24: wherein the transistors are of the field-effect type only (G05F3/205, G05F3/26, G05F3/30 take precedence)
- H02P 25/034: Voice coil motors (voice coil motors driven by DC H02P7/025)
- H03F 1/301: {in MOSFET amplifiers (H03F1/303, H03F1/305, H03F1/308 take precedence)}
- H03F 3/45: Differential amplifiers (differential sense amplifiers G11C7/062)
- H03F 3/45183: {Long tailed pairs (H03F3/4521, H03F3/45237 take precedence)}
- H03F 3/45748: {by using a feedback circuit}
- G03B 2205/0053: Driving means for the movement of one or more optical element
- H03F 2200/453: Controlling being realised by adding a replica circuit or by using one among multiple identical circuits as a replica circuit
- H03F 2203/45048: Calibrating and standardising a dif amp
- H03F 2203/45212: the differential amplifier being designed to have a reduced offset
- H03M 1/1009: {Calibration}
- H03F: AMPLIFIERS
- G03B: APPARATUS OR ARRANGEMENTS FOR TAKING PHOTOGRAPHS OR FOR PROJECTING OR VIEWING THEM; APPARATUS OR ARRANGEMENTS EMPLOYING ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ACCESSORIES THEREFOR (optical parts of such apparatus G02B; photosensitive materials or processes for photographic purposes G03C; apparatus for processing exposed photographic materials G03D)
- G05F: SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- H02P: CONTROL OR REGULATION OF ELECTRIC MOTORS, ELECTRIC GENERATORS OR DYNAMO-ELECTRIC CONVERTERS; CONTROLLING TRANSFORMERS, REACTORS OR CHOKE COILS
- H03M: CODING; DECODING; CODE CONVERSION IN GENERAL (using fluidic means F15C4/00; optical analogue/digital converters G02F7/00; coding, decoding or code conversion, specially adapted for particular applications, see the relevant subclasses, e.g. G01D, G01R, G06F, G06T, G09G, G10L, G11B, G11C, H04B, H04L, H04M, H04N; ciphering or deciphering for cryptography or other purposes involving the need for secrecy G09C)

## Abstract

Driver circuits, systems for driving actuators, and imaging systems with actuators. The driver circuit includes a current comparator circuit, a driver, and a replica circuit. The current comparator circuit includes a first node having a first voltage. The current comparator circuit also includes a second node having a second voltage. The driver includes a first terminal responsive to the second voltage. The driver also includes a second terminal connected to a reference voltage. The replica circuit includes a third terminal connected to the first node. The replica circuit also includes a fourth terminal connected to the second terminal of the driver. The replica circuit also includes a fifth terminal connected to the first terminal of the driver.

## Claims

### Claim 1

A circuit, comprising:
a current comparator circuit including:
a first node having a first voltage, and
a second node having a second voltage;
a driver including:
a first terminal responsive to the second voltage, and
a second terminal connected to a reference voltage; and
a replica circuit including:
a third terminal connected to the first node,
a fourth terminal connected to the second terminal of the driver, and
a fifth terminal connected to the first terminal of the driver.

### Claim 2 (depends on 1)

The circuit of claim 1, wherein the replica circuit is configured to generate a replica current that is proportional to a drive current of the driver.

### Claim 3 (depends on 1)

The circuit of claim 1, wherein the current comparator circuit further includes a first transistor and a second transistor connected in series with each other.

### Claim 4 (depends on 3)

The circuit of claim 3, wherein the first node is located between the first transistor and the second transistor.

### Claim 5 (depends on 3)

The circuit of claim 3, wherein the replica circuit further includes a third transistor, and wherein the second node is located between the second transistor and the third transistor.

### Claim 6 (depends on 1)

The circuit of claim 1, wherein the replica circuit further includes a transistor having a drain terminal, a source terminal, a gate terminal, wherein the third terminal is the drain terminal, wherein the fourth terminal is the source terminal, and wherein the fifth terminal is the gate terminal.

### Claim 7 (depends on 1)

The circuit of claim 1, wherein the replica circuit further includes a transistor and the third terminal is a drain terminal, the fourth terminal is a source terminal, and the fifth terminal is a gate terminal.

### Claim 8

A system, comprising:
an actuator; and
a control circuit configured to control the actuator and including:
a current comparator circuit including:
a first node having a first voltage, and
a second node having a second voltage,
a driver including:
a first terminal responsive to the second voltage, and
a second terminal connected to a reference voltage, and
a replica circuit including:
a third terminal connected to the first node,
a fourth terminal connected to the second terminal of the driver, and
a fifth terminal connected to the first terminal of the driver.

### Claim 9 (depends on 8)

The system of claim 8, wherein the replica circuit is configured to generate a replica current that is proportional to a drive current of the driver.

### Claim 10 (depends on 8)

The system of claim 8, wherein the current comparator circuit further includes a first transistor and a second transistor connected in series with each other.

### Claim 11 (depends on 10)

The system of claim 10, wherein the first node is located between the first transistor and the second transistor.

### Claim 12 (depends on 10)

The system of claim 10, wherein the replica circuit further includes a third transistor, and wherein the second node is located between the second transistor and the third transistor.

### Claim 13 (depends on 8)

The system of claim 8, wherein the current comparator circuit is configured to generate a comparator output voltage at the second node.

### Claim 14 (depends on 8)

The system of claim 8, wherein the replica circuit further includes a transistor having a drain terminal, a source terminal, a gate terminal, wherein the third terminal is the drain terminal, wherein the fourth terminal is the source terminal, and wherein the fifth terminal is the gate terminal.

### Claim 15

An imaging system, comprising:
a lens;
an actuator configured to adjust a position of the lens;
a current comparator circuit including:
a first node having a first voltage, and
a second node having a second voltage;
a driver configured to control the actuator and including:
a first terminal responsive to the second voltage, and
a second terminal connected to a reference voltage; and
a replica circuit including:
a third terminal connected to the first node,
a fourth terminal connected to the second terminal of the driver, and
a fifth terminal connected to the first terminal of the driver.

### Claim 16 (depends on 15)

The imaging system of claim 15, wherein the replica circuit is configured to generate a replica current that is proportional to a drive current of the driver.

### Claim 17 (depends on 15)

The imaging system of claim 15, wherein the current comparator circuit further includes a first transistor and a second transistor connected in series with each other.

### Claim 18 (depends on 17)

The imaging system of claim 17, wherein the first node is located between the first transistor and the second transistor.

### Claim 19 (depends on 17)

The imaging system of claim 17, wherein the replica circuit further includes a third transistor, and wherein the second node is located between the second transistor and the third transistor.

### Claim 20 (depends on 15)

The imaging system of claim 15, wherein the current comparator circuit is configured to generate a comparator output voltage at the second node.
