# US 12,015,346 B2 · Control loop and efficiency enhancement for DC-DC converters > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 12,015,346 B2 - Document ID: US12015346B2 - Status: Granted - Kind: B2 - Application number: 17/565,674 - Filed: 2021-12-30 - Published: 2023-07-06 - Granted: 2024-06-18 - Earliest claimed: 2021-12-30 - Assignees: STMicroelectronics S.r.l. - Applicants: STMicroelectronics S.r.l. - Inventors: Andrea Barbieri; Aldo Vidoni; Marco Zamprogno - Web page: https://patentgrep.com/patent/US12015346B2 ## CPC - H02M 3/157: with digital control - H02M 3/158: including plural semiconductor devices as final control devices for a single load - H02M 1/0025: {Arrangements for modifying reference values, feedback values or error values in the control loop of a converter} - H02M 1/0035: {using burst mode control} - H02M 1/0048: {Circuits or arrangements for reducing losses (using snubbers H02M1/34)} - H02M 1/08: Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters - H02M: APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF (transformers H01F; dynamo-electric converters H02K47/00; controlling transformers, reactors or choke coils, control or regulation of electric motors, generators or dynamo-electric converters H02P) ## Abstract A DC-DC boost converter includes an inductor coupled between an input voltage and an input node, a diode coupled between the input node and an output node, and an output capacitor coupled between the output node and ground such that an output voltage is formed across the output capacitor. A switch selectively couples the input node to ground in response to a drive signal. Control loop circuitry includes an error amplifier to generate an analog error voltage based upon a comparison of a feedback voltage to a reference voltage, the feedback voltage being indicative of the output voltage, a quantizer to quantize the analog error voltage to produce a digital error signal, and a drive voltage generation circuit to generate the drive signal as having a duty cycle based upon the digital error signal. ## Claims ### Claim 1 A device comprising a DC-DC boost converter, wherein the DC-DC boost converter comprises: an inductor coupled between an input voltage and an input node; a diode coupled between the input node and an output node; an output capacitor coupled between the output node and ground such that an output voltage is formed across the output capacitor; a switch selectively coupling the input node to ground in response to a drive signal; and control loop circuitry comprising: an error amplifier configured to generate an analog error voltage based upon a comparison of a feedback voltage to a reference voltage, the feedback voltage being indicative of the output voltage; a quantizer configured to quantize the analog error voltage to produce a digital error signal; and a drive voltage generation circuit configured to generate the drive signal as having a duty cycle based upon the digital error signal; wherein the DC-DC boost converter is operable in a normal mode in which the drive voltage generation circuit generates the drive signal as periodic with the duty cycle thereof selectively adjusted based upon the digital error signal; and wherein the DC-DC boost converter is operable in a skip mode in which the drive voltage generation circuit skips generation of selected pulses of the drive signal with the duty cycle thereof being changed based upon the digital error signal only when the digital error signal indicates that the analog error voltage is greater than one half of a full scale voltage of the error amplifier. ### Claim 2 (depends on 1) The device of claim 1, wherein the quantizer is configured to produce the digital error signal as a thermometer code signal. ### Claim 3 (depends on 2) The device of claim 2, wherein the thermometer code signal has a plurality of different possible thermometer code values, with the duty cycle being selected from among a plurality of different possible duty cycles, each of the plurality of different possible duty cycles being associated with a different one of the plurality of different possible thermometer code values. ### Claim 4 (depends on 1) The device of claim 1, wherein the drive voltage generation circuit comprises a digital logic circuit clocked by a local clock; and wherein the quantizer is clocked by a division of the local clock. ### Claim 5 (depends on 1) The device of claim 1, wherein the switch comprises an NMOS transistor having a drain coupled to the input node, a source coupled to ground, and a gate coupled to receive the drive signal from the drive voltage generation circuit. ### Claim 6 (depends on 1) The device of claim 1, further comprising drive circuitry powered by the output voltage, and a micromirror driven by the drive circuitry. ### Claim 7 A device comprising a DC-DC boost converter, wherein the DC-DC boost converter comprises: an inductor coupled between an input voltage and an input node; a diode coupled between the input node and an output node; an output capacitor coupled between the output node and ground such that an output voltage is formed across the output capacitor; a switch selectively coupling the input node to ground in response to a drive signal; and first control loop circuitry comprising: a clamp circuit configured to generate a clamp voltage based upon a voltage formed at the input node; a first comparator configured to assert a first comparison signal when the clamp voltage falls below a ground voltage; a second comparator configured to assert a second comparison signal when the clamp voltage rises above the ground voltage; and a logic circuit configured to: generate first pulses of the drive signal as corresponding to pulses of an input drive signal when the clamp voltage is at least at the ground voltage; and generate second pulses of the drive signal as having a first transition when the first comparison signal is asserted and a second transition when the second comparison signal is asserted. ### Claim 8 (depends on 7) The device of claim 7, wherein the logic circuit is further configured to cause the first comparator to continue to assert the first comparison signal for a given period of time, in response to the first comparator detecting that the clamp voltage has fallen below the ground voltage, and subsequently cause the second comparator to continue to assert the second comparison signal for a given period of time, in response to the second comparator detecting that the clamp voltage has risen above the ground voltage. ### Claim 9 (depends on 7) The device of claim 7, wherein the switch comprises an NMOS transistor having a drain coupled to the input node, a source coupled to the ground voltage, and a gate coupled to receive the drive signal from the drive voltage generation circuit. ### Claim 10 (depends on 7) The device of claim 7, further comprising drive circuitry powered by the output voltage, and a micromirror driven by the drive circuitry. ### Claim 11 (depends on 7) The device of claim 7, further comprising second control loop circuitry comprising: an error amplifier configured to generate an analog error voltage based upon a comparison of a feedback voltage to a reference voltage, the feedback voltage being indicative of the output voltage; a quantizer configured to quantize the analog error voltage to produce a digital error signal; and a drive voltage generation circuit configured to generate the input drive signal as having a duty cycle based upon the digital error signal. ### Claim 12 (depends on 11) The device of claim 11, wherein the quantizer is configured to produce the digital error signal as a thermometer code signal. ### Claim 13 (depends on 12) The device of claim 12, wherein the thermometer code signal has a plurality of different possible thermometer code values, with the duty cycle being selected from among a plurality of different possible duty cycles, each of the plurality of different possible duty cycles being associated with a different one of the plurality of different possible thermometer code values. ### Claim 14 (depends on 11) The device of claim 11, wherein the drive voltage generation circuit comprises a digital logic circuit clocked by a local clock; and wherein the quantizer is clocked by a division of the local clock. ### Claim 15 (depends on 11) The device of claim 11, wherein the DC-DC boost converter is operable in a normal mode in which the drive signal is periodic and has its duty cycle selectively adjusted based upon the digital error signal; and wherein the DC-DC boost converter is operable in a skip mode in which selected pulses of the drive signal are skipped. ### Claim 16 (depends on 15) The device of claim 15, wherein, when the DC-DC boost converter is operating in the skip mode, the duty cycle of the drive signal is changed based upon the digital error signal only when the digital error signal indicates that the analog error voltage is greater than one half of a full scale voltage of the error amplifier.