# US 12,015,076 B2 · HEMT and method of fabricating the same

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- Number: US 12,015,076 B2
- Document ID: US12015076B2
- Status: Granted
- Kind: B2
- Application number: 18/092,916
- Filed: 2023-01-03
- Published: 2023-05-11
- Granted: 2024-06-18
- Earliest claimed: 2020-11-26
- Assignees: United Microelectronics Corp.
- Applicants: United Microelectronics Corp.
- Inventors: Chih-Wei Chang; Yao-Hsien Chung; Shih-Wei Su; Hao-Hsuan Chang; Da-Jun Lin; Ting-An Chien; Bin-Siang Tsai
- Web page: https://patentgrep.com/patent/US12015076B2

## CPC

- H10D 30/015: {of FETs having heterojunction interface channels or heterojunction gate electrodes, e.g. HEMT}
- H10D 30/475: {having wider bandgap layer formed on top of lower bandgap active layer, e.g. undoped barrier HEMTs such as i-AlGaN/GaN HEMTs}
- H10D 62/115: {Dielectric isolations, e.g. air gaps}
- H10D 62/343: {Gate regions of field-effect devices having PN junction gates}
- H10D 62/8503: {Nitride Group III-V materials, e.g. AlN or GaN}
- H10D 64/513: {within recesses in the substrate, e.g. trench gates, groove gates or buried gates}
- H10D 64/514: {characterised by the insulating layers}
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES

## Abstract

A high electron mobility transistor includes a first III-V compound layer. A second III-V compound layer is disposed on the first III-V compound layer. The composition of the first III-V compound layer is different from that of the second III-V compound layer. A trench is disposed within the first III-V compound layer and the second III-V compound layer. The trench has a first corner and a second corner. The first corner and the second corner are disposed in the first III-V compound layer. A first dielectric layer contacts a sidewall of the first corner. A second dielectric layer contacts a sidewall of the second corner. The first dielectric layer and the second dielectric layer are outside of the trench. A gate is disposed in the trench. A source electrode and a drain electrode are respectively disposed at two sides of the gate. A gate electrode is disposed on the gate.

## Claims

### Claim 1

A fabricating method of a high electron mobility transistor (HEMT), comprising:
providing a first III-V compound layer;
forming a recess within the first III-V compound layer;
forming a dielectric layer filling up the recess;
forming a second III-V compound layer disposed on the first III-V compound layer and contacting the dielectric layer, wherein a composition of the first III-V compound layer is different from a composition of second III-V compound layer;
forming a trench in the first III-V compound layer and the second III-V compound layer, wherein the trench separates the dielectric layer into a first dielectric layer and a second dielectric layer, and the first dielectric layer and the second dielectric layer are disposed respectively at two sides of the trench;
forming a gate within the trench;
forming a source electrode, a drain electrode and a gate electrode, wherein the gate electrode is disposed directly on the gate, and the source electrode and the drain electrode are respectively disposed at two sides of the gate.

### Claim 2 (depends on 1)

The fabricating method of the HEMT of claim 1, further comprising: before forming the trench, forming a protective layer covering the second III-V compound layer.

### Claim 3 (depends on 2)

The fabricating method of the HEMT of claim 2, wherein the trench is disposed within the protective layer, the second III-V compound layer and the first III-V compound layer.

### Claim 4 (depends on 1)

The fabricating method of the HEMT of claim 1, further comprising before forming the gate, forming a third III-V compound layer contacting the trench, wherein the third III-V compound layer and the second III-V compound layer are formed by the same composition of group III-V elements.

### Claim 5 (depends on 1)

The fabricating method of the HEMT of claim 1, wherein the first III-V compound layer is gallium nitride, the second III-V compound layer comprises aluminum gallium nitride, aluminum indium nitride, aluminum indium gallium nitride or aluminum nitride.

### Claim 6 (depends on 1)

The fabricating method of the HEMT of claim 1, wherein the trench has a first corner and a second corner both disposed within the first III-V compound layer, the first corner is formed by a first sidewall and a bottom of the trench, the second corner is formed by a second sidewall and the bottom of the trench, the first dielectric layer contacts the first sidewall and the second dielectric layer contacts the second sidewall, and the first dielectric layer and the second dielectric layer are both disposed outside of the trench.

### Claim 7 (depends on 1)

The fabricating method of the HEMT of claim 1, wherein the gate is a P-type doped III-V compound layer, the P-type doped III-V compound layer and the first III-V compound layer are formed by the same composition of group III-V elements.

### Claim 8 (depends on 1)

The fabricating method of the HEMT of claim 1, wherein the first electric layer comprises SiN, SiO2, SION, SiOCN, AlN, Al2O3, AlON or GaON and the second electric layer comprises SiN, SiO2, SION, SiOCN, AlN, Al2O3, AlON or GaON.