# US 12,015,042 B2 · Structure and material engineering methods for optoelectronic devices signal to noise ratio enhancement

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- Number: US 12,015,042 B2
- Document ID: US12015042B2
- Status: Granted
- Kind: B2
- Application number: 16/797,807
- Filed: 2020-02-21
- Published: 2021-08-26
- Granted: 2024-06-18
- Earliest claimed: 2020-02-21
- Assignees: Applied Materials, Inc.
- Applicants: Applied Materials, Inc.
- Inventors: Papo Chen; Schubert Chu; Errol Antonio C Sanchez; John Timothy Boland; Zhiyuan Ye; Lori Washington; Xianzhi Tao; Yi-Chiau Huang; Chen-Ying Wu
- Web page: https://patentgrep.com/patent/US12015042B2

## CPC

- H10F 39/811: {Interconnections}
- H10F 39/014: {of CMOS image sensors}
- H10F 39/18: Complementary metal-oxide-semiconductor [CMOS] image sensors; Photodiode array image sensors
- H10F 39/199: {Back-illuminated image sensors}
- H10F 39/807: {Pixel isolation structures}
- H10F 71/139: {using temporary substrates}
- H10F: INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION

## Abstract

A method of fabricating a semiconductor device includes forming an interconnect structure over a front side of a sensor substrate, thinning the sensor substrate from a back side of the sensor substrate, etching trenches into the sensor substrate, pre-cleaning an exposed surface of the sensor substrate, epitaxially growing a charge layer directly on the pre-cleaned exposed surface of the sensor substrate, and forming isolation structures within the etched trenches.

## Claims

### Claim 1

A method of fabricating a semiconductor device, comprising:
forming an interconnect structure over a front side of a sensor substrate;
thinning the sensor substrate from a back side of the sensor substrate;
etching trenches into the sensor substrate;
pre-cleaning an exposed surface of the sensor substrate;
epitaxially growing a charge layer directly on the back side of the pre-cleaned exposed surface of the sensor substrate and within the trenches; and
forming isolation structures within the etched trenches.

### Claim 2 (depends on 1)

The method of claim 1, wherein the sensor substrate is a silicon photodiode.

### Claim 3 (depends on 1)

The method of claim 1, wherein the charge layer comprises a material selected from boron-doped silicon, boron-doped silicon germanium, and boron-doped germanium.

### Claim 4 (depends on 3)

The method of claim 3, wherein a density of charge carriers in the charge layer is between 1×1018/cm3 and 5×1021/cm3.

### Claim 5 (depends on 1)

The method of claim 1, wherein the charge layer has a thickness of between 5 nm and 50 nm.

### Claim 6 (depends on 1)

The method of claim 1, wherein the epitaxial growth of the charge layer is performed at a temperature of 450° C. or less.

### Claim 7 (depends on 1)

The method of claim 1, wherein the isolation structures comprise a dielectric material selected from silicon oxide and silicon nitride.

### Claim 8 (depends on 1)

The method of claim 1, wherein the isolation structures are formed directly on the charge layer.

### Claim 9 (depends on 1)

The method of claim 1, wherein the trenches are etched into the sensor substrate after thinning the sensor substrate from the back side.