# US 12,015,021 B2 · Display device and array substrate

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- Number: US 12,015,021 B2
- Document ID: US12015021B2
- Status: Granted
- Kind: B2
- Application number: 17/212,100
- Filed: 2021-03-25
- Published: 2021-07-08
- Granted: 2024-06-18
- Earliest claimed: 2018-09-26
- Assignees: Japan Display Inc.
- Applicants: Japan Display Inc.
- Inventors: Masanobu Ikeda; Yasuhiro Kanaya; Yoshinori Aoki
- Web page: https://patentgrep.com/patent/US12015021B2

## CPC

- H10W 90/00: Package configurations
- G09F 9/30: in which the desired character or characters are formed by combining individual elements (panels comprising a number of electrodes in a single cell controlling light arriving from an independent light source, e.g. electro-optical or magneto-optical cell, G02F1/00)
- G09G 3/20: for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix {no fixed position being assigned to or needed to be assigned to the individual characters or partial characters}
- G09G 3/32: semiconductive, e.g. using light-emitting diodes [LED]
- G09G 3/3233: with pixel circuitry controlling the current through the light-emitting element
- H10D 86/431: {having different compositions, shapes, layouts or thicknesses of gate insulators in different TFTs}
- H10D 86/441: {Interconnections, e.g. scanning lines}
- H10D 86/451: {characterised by the compositions or shapes of the interlayer dielectrics}
- H10D 86/481: {integrated with passive devices, e.g. auxiliary capacitors}
- H10D 86/60: wherein the TFTs are in active matrices
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- G09F: DISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
- G09G: ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION (arrangements for transferring data between digital computers and displays G06F3/14; static indicating arrangements comprising an association of a number of separate sources or light control cells G09F9/00; static indicating arrangements comprising integral associations of a number of light sources H01J, H01K, H10H, H05B33/12; scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission, details thereof H04N1/00)
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES

## Abstract

A display device includes a substrate, a plurality of pixels provided to the substrate, a light emitting element and a plurality of transistors provided to each of the pixels, signal lines configured to supply a signal to the pixels, a first semiconductor layer and a second semiconductor layer provided in different layers in a direction perpendicular to the substrate and overlap at least partially in planar view, first gate electrodes each of which is provided in a region overlapping a part of the first semiconductor layer, a first insulating film provided between the first gate electrodes and the first semiconductor layer, and a second insulating film provided between the first semiconductor layer and the second semiconductor layer.

## Claims

### Claim 1

A display device comprising:
a substrate;
a plurality of pixels provided to the substrate;
a light emitting element and a plurality of transistors provided to each of the pixels;
signal lines configured to supply a signal to the pixels;
a first semiconductor layer and a second semiconductor layer provided in different layers in a direction perpendicular to the substrate and overlapping at least partially in planar view;
first gate electrodes each of which is provided in a region overlapping a part of the first semiconductor layer;
a first insulating film provided between the first gate electrodes and the first semiconductor layer; and
a second insulating film provided between the first semiconductor layer and the second semiconductor layer, wherein
the transistors each include a first transistor and a second transistor,
the first transistor comprises the first semiconductor layer and supplies an electric current to the light emitting element,
the second transistor comprises the second semiconductor layer and is coupled to the first transistor,
the first transistors each comprise one of the first gate electrodes overlapping the first semiconductor layer, and
the second transistors each comprise two second gate electrodes overlapping the second semiconductor layer.

### Claim 2 (depends on 1)

The display device according to claim 1, wherein capacitance per unit area formed between the first semiconductor layer and the first gate electrode is larger than capacitance per unit area formed between the second semiconductor layer and the second gate electrodes.

### Claim 3 (depends on 1)

The display device according to claim 1, further comprising:
gate lines coupled to the second gate electrodes of the second transistors, wherein
sheet resistance of the signal lines is lower than sheet resistance of the gate lines.

### Claim 4 (depends on 1)

The display device according to claim 1, further comprising:
a third insulating film provided between the second semiconductor layer and the signal lines in the direction perpendicular to the substrate; and
a fourth insulating film provided on the signal lines, wherein
relative permittivity of the first insulating film, the second insulating film, and the third insulating film is higher than relative permittivity of the fourth insulating film.

### Claim 5 (depends on 1)

The display device according to claim 1, further comprising:
a power supply line configured to supply a drive potential to the pixels, wherein
sheet resistance of the power supply line is equal to or lower than sheet resistance of the signal lines.

### Claim 6 (depends on 5)

The display device according to claim 5, further comprising:
a third insulating film provided between the second semiconductor layer and the signal lines in the direction perpendicular to the substrate, wherein
the first insulating film, the second insulating film, and the third insulating film have a first part overlapping the power supply line and a second part not overlapping the power supply line, and
the thickness of the first part of the first insulating film, the second insulating film, and the third insulating film is smaller than the thickness of the second part.

### Claim 7

An array substrate comprising:
a substrate;
a plurality of transistors provided to the substrate;
a first semiconductor layer and a second semiconductor layer provided in different layers in a direction perpendicular to the substrate and overlapping at least partially in planar view;
first gate electrodes each of which is provided in a region overlapping a part of the first semiconductor layer;
a first insulating film provided between the first gate electrodes and the first semiconductor layer; and
a second insulating film provided between the first semiconductor layer and the second semiconductor layer, wherein
the transistors each include a first transistor and a second transistor,
the first transistor comprises the first semiconductor layer,
the second transistor comprises the second semiconductor layer and is coupled to the first transistor,
the first transistors each comprise one of the first gate electrodes overlapping the first semiconductor layer, and
the second transistors each comprise two second gate electrodes overlapping the second semiconductor layer.