# US 12,015,000 B2 · Semiconductor product with interlocking metal-to-metal bonds and method for manufacturing thereof

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- Number: US 12,015,000 B2
- Document ID: US12015000B2
- Status: Granted
- Kind: B2
- Application number: 17/328,563
- Filed: 2021-05-24
- Published: 2021-09-09
- Granted: 2024-06-18
- Earliest claimed: 2016-01-06
- Assignees: Amkor Technology Singapore Holding Pte. Ltd.
- Applicants: Amkor Technology Singapore Holding Pte. Ltd.
- Inventors: Bora Baloglu; Curtis Zwenger; Ron Huemoeller
- Web page: https://patentgrep.com/patent/US12015000B2

## CPC

- H10W 90/00: Package configurations
- H10W 72/01255: {by using masks}
- H10W 72/019: {of bond pads}
- H10W 72/01935: {by plating, e.g. electroless plating or electroplating}
- H10W 72/01938: {in gaseous form, e.g. by CVD or PVD}
- H10W 72/01955: {by using masks}
- H10W 72/0198: {batch processes}
- H10W 72/072: {of bump connectors}
- H10W 72/07207: {Temporary substrates, e.g. removable substrates}
- H10W 72/07227: {involving guiding structures, e.g. spacers or supporting members}
- H10W 72/07231: {Techniques}
- H10W 72/07232: {Compression bonding, e.g. thermocompression bonding}
- H10W 72/07253: {changes in shapes}
- H10W 72/073: {of die-attach connectors}
- H10W 72/231: {Shapes}
- H10W 72/232: {Plan-view shape, i.e. in top view}
- H10W 72/234: {Cross-sectional shape, i.e. in side view}
- H10W 72/252: {comprising solid metals or solid metalloids, e.g. PbSn, Ag or Cu}
- H10W 72/29: Bond pads specially adapted therefor
- H10W 72/90: Bond pads, in general
- H10W 72/923: {Bond pads having multiple stacked layers}
- H10W 72/934: {Cross-sectional shape, i.e. in side view}
- H10W 72/9415: {relative to the surface, e.g. recessed, protruding}
- H10W 72/952: {comprising metals or metalloids, e.g. PbSn, Ag or Cu}
- H10W 74/15: on active surfaces of flip-chip devices, e.g. underfills
- H10W 80/334: {Thermocompression bonding}
- H10W 90/722: {between stacked chips}
- H10W 90/724: {between a chip and a stacked insulating package substrate, interposer or RDL}
- H10W 90/732: {between stacked chips}
- H10W 90/734: {between a chip and a stacked insulating package substrate, interposer or RDL}
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10

## Abstract

A structure and method for performing metal-to-metal bonding in an electrical device. For example and without limitation, various aspects of this disclosure provide a structure and method that utilize an interlocking structure configured to enhance metal-to-metal bonding.

## Claims

### Claim 1

A method of manufacturing an electronic device, the method comprising:
providing an upper assembly comprising:
an upper substrate; and
an upper metal contact structure (UMCS) that comprises a metal, the upper metal contact structure (UMCS) comprising an upper UMCS side coupled to the upper substrate, and a lower UMCS side;
providing a lower assembly comprising:
a lower substrate; and
a lower metal contact structure (LMCS) comprising the metal, the lower metal contact structure (LMCS) comprising a lower LMCS side coupled to the lower substrate, and an upper LMCS side; and
forming a metal-to-metal solderless bond only between the lower UMCS side and the upper LMCS side, said forming comprising:
positioning the upper assembly directly on and in contact with the lower assembly, such that there is a vertical gap between the lower UMCS side and the upper LMCS side; and
after said positioning, reducing or eliminating the vertical gap by, at least in part, applying heat to the upper and lower assemblies.

### Claim 2 (depends on 1)

The method of claim 1, wherein a portion of the vertical gap is directly above a center of the upper LMCS side.

### Claim 3 (depends on 1)

The method of claim 1, wherein a portion of the vertical gap is directly above a peripheral edge of the upper LMCS side.

### Claim 4 (depends on 1)

The method of claim 1, wherein the upper metal contact structure (UMCS) comprises a UMCS lateral width, and the lower metal contact structure (LMCS) comprises an LMCS lateral width that is greater than the UMCS lateral width.

### Claim 5 (depends on 1)

The method of claim 1, wherein:
the upper assembly comprises a UMCS oxide layer that laterally surrounds the upper metal contact structure (UMCS); and
the lower assembly comprises an LMCS oxide layer that laterally surrounds the lower metal contact structure (LMCS).

### Claim 6 (depends on 1)

The method of claim 1, wherein the lower UMCS side comprises a convex curvature at a periphery of the lower UMCS side.

### Claim 7 (depends on 1)

The method of claim 1, wherein after said forming the metal-to-metal solderless bond, the vertical gap is eliminated.

### Claim 8

A method of manufacturing an electronic device, the method comprising:
providing an upper assembly comprising:
an upper substrate;
an upper metal contact structure (UMCS) that comprises a metal, the upper metal contact structure (UMCS) comprising an upper UMCS side coupled to the upper substrate, and a lower UMCS side; and
a UMCS dielectric layer that forms a portion of a lower side of the upper assembly, wherein the UMCS dielectric layer comprises an oxide or a nitride;
providing a lower assembly comprising:
a lower substrate;
a lower metal contact structure (LMCS) comprising the metal, the lower metal contact structure (LMCS) comprising a lower LMCS side coupled to the lower substrate, and an upper LMCS side; and
an LMCS dielectric layer that forms a portion of an upper side of the lower assembly, wherein the LMCS dielectric layer comprises an oxide or a nitride; and
forming a metal-to-metal solderless bond between the lower UMCS side and the upper LMCS side, said forming comprising:
positioning the upper assembly directly on the lower assembly; and
after said positioning, applying at least a heat to the upper and lower assemblies.

### Claim 9 (depends on 8)

The method of claim 8, comprising prior to providing the upper assembly, forming the UMCS dielectric layer with a thermal oxidation process.

### Claim 10 (depends on 8)

The method of claim 8, wherein after said forming the metal-to-metal solderless bond, a portion of the UMCS dielectric layer is vertically aligned with the lower metal contact structure (LMCS), and a portion of the LMCS dielectric layer is vertically aligned with the upper metal contact structure (UMCS).

### Claim 11 (depends on 10)

The method of claim 10, wherein no portion of the UMCS dielectric layer is vertically aligned with a laterally central part of the lower metal contact structure (LMCS), and no portion of the LMCS dielectric layer is vertically aligned with a laterally central part of the upper metal contact structure (UMCS).

### Claim 12 (depends on 8)

The method of claim 8, wherein:
the upper metal contact structure (UMCS) comprises a UMCS lateral width and a UMCS vertical height; and
the lower metal contact structure (LMCS) comprises a LMCS lateral width that is greater than the UMCS lateral width, and an LMCS vertical height that is less than the UMCS vertical height.

### Claim 13 (depends on 12)

The method of claim 12, wherein the lower UMCS side comprises a convex curvature at a periphery of the lower UMCS side.

### Claim 14 (depends on 8)

The method of claim 8, wherein the UMCS dielectric layer comprises silicon oxide.

### Claim 15

An electronic device comprising:
an upper assembly comprising:
an upper substrate;
an upper metal contact structure (UMCS) that comprises a metal, the upper metal contact structure (UMCS) comprising an upper UMCS side coupled to the upper substrate, and a lower UMCS side; and
a UMCS dielectric layer that forms a portion of a lower side of the upper assembly, wherein the UMCS dielectric layer comprises an oxide or a nitride;
a lower assembly comprising:
a lower substrate;
a lower metal contact structure (LMCS) comprising the metal, the lower metal contact structure (LMCS) comprising a lower LMCS side coupled to the lower substrate, and an upper LMCS side; and
an LMCS dielectric layer that forms a portion of an upper side of the lower assembly, wherein the LMCS dielectric layer comprises an oxide or a nitride; and
a metal-to-metal solderless bond between the lower UMCS side and the upper LMCS side.

### Claim 16 (depends on 15)

The electronic device of claim 15, wherein a portion of the UMCS dielectric layer is vertically aligned with the lower metal contact structure (LMCS), and a portion of the LMCS dielectric layer is vertically aligned with the upper metal contact structure (UMCS).

### Claim 17 (depends on 16)

The electronic device of claim 16, wherein no portion of the UMCS dielectric layer is vertically aligned with a laterally central part of the lower metal contact structure (LMCS), and no portion of the LMCS dielectric layer is vertically aligned with a laterally central 38 of the upper metal contact structure (UMCS).

### Claim 18 (depends on 15)

The electronic device of claim 15, wherein:
the upper metal contact structure (UMCS) comprises a UMCS lateral width and a UMCS vertical height; and
the lower metal contact structure (LMCS) comprises an LMCS lateral width that is greater than the UMCS lateral width, and an LMCS vertical height that is less than the UMCS vertical height.

### Claim 19 (depends on 18)

The electronic device of claim 18, wherein the lower UMCS side comprises a convex curvature at a periphery of the lower UMCS side.

### Claim 20 (depends on 15)

The electronic device of claim 15, wherein the UMCS dielectric layer comprises silicon oxide.