# US 12,014,955 B2 · Method for fabricating conductive layer stack and method for fabricating semiconductor device with gate contact

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- Number: US 12,014,955 B2
- Document ID: US12014955B2
- Status: Granted
- Kind: B2
- Application number: 17/573,832
- Filed: 2022-01-12
- Published: 2023-07-13
- Granted: 2024-06-18
- Earliest claimed: 2022-01-12
- Assignees: Nanya Technology Corporation
- Applicants: Nanya Technology Corporation
- Inventors: Che-Hsien Liao; Yueh Hsu
- Web page: https://patentgrep.com/patent/US12014955B2

## CPC

- H10W 20/035: {combinations of barrier, adhesion or liner layers, e.g. multi-layered barrier layers}
- H10W 20/042: {the barrier, adhesion or liner layers being seed or nucleation layers}
- H10W 20/045: {for deposition from the gaseous phase, e.g. for chemical vapour deposition [CVD]}
- H10W 20/056: {by filling conductive material into holes, grooves or trenches}
- H10W 20/066: {by forming silicides of refractory metals}
- H10W 20/425: {Barrier, adhesion or liner layers}
- H10W 20/435: {Cross-sectional shapes or dispositions of interconnections}
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10

## Abstract

The present application discloses a method for fabricating a conductive layer stack. The method includes forming an intervening layer on an under-layer; and forming a filler layer on the intervening layer, wherein the filler layer comprises tungsten. The intervening layer comprises tungsten silicide and a thickness of the intervening layer is greater than 4.1 nm. The under-layer comprises titanium nitride and comprises a columnar grain structure.

## Claims

### Claim 1

A method for fabricating a conductive layer stack, comprising:
forming an under-layer on a substrate, wherein the under-layer comprises titanium nitride and comprises a columnar grain structure;
forming an intervening layer on the under-layer which comprises titanium nitride, wherein the intervening layer comprises tungsten silicide and a thickness of the intervening layer is greater than 4.1 nm;
exposing the intervening layer to pulses of a germanium-containing reducing agent in a hydrogen environment to form a layer of germanium on the intervening layer; and
exposing the layer of germanium to pulses of a tungsten-containing precursor to form a filler layer on the intervening layer, wherein the filler layer comprises tungsten.

### Claim 2 (depends on 1)

The method for fabricating the conductive layer stack of claim 1, wherein forming the intervening layer on the under-layer comprises:
forming an intervening nucleation layer on the under-layer; and
forming an intervening bulk layer on the intervening nucleation layer.

### Claim 3 (depends on 2)

The method for fabricating the conductive layer stack of claim 2, wherein forming the filler layer on the intervening layer comprises:
forming a filler nucleation layer on the intervening layer; and
forming a filler bulk layer on the filler nucleation layer.

### Claim 4 (depends on 3)

The method for fabricating the conductive layer stack of claim 3, wherein tungsten of the filler layer is alpha phase tungsten.

### Claim 5 (depends on 4)

The method for fabricating the conductive layer stack of claim 4, wherein forming the intervening nucleation layer on the under-layer comprising:
flowing a reactant gas, a first silicon source gas, and an inert carrier gas over the under-layer; and
switching the first silicon source gas to a second silicon source gas to form the intervening nucleation layer.

### Claim 6 (depends on 5)

The method for fabricating the conductive layer stack of claim 5, wherein the first silicon source gas is silane, and the second silicon source gas is dichlorosilane.

### Claim 7 (depends on 6)

The method for fabricating the conductive layer stack of claim 6, wherein the reactant gas is tungsten hexafluoride.

### Claim 8 (depends on 7)

The method for fabricating the conductive layer stack of claim 7, wherein the inert carrier gas is argon, nitrogen, helium, or a combination thereof.

### Claim 9 (depends on 8)

The method for fabricating the conductive layer stack of claim 8, wherein a flow rate of the inert carrier gas is as great as five to ten times the flow rate of the first silicon source gas.

### Claim 10

A method for fabricating a semiconductor device, comprising:
providing a substrate;
forming a gate structure on the substrate; and
forming a gate contact on the gate structure comprising:
forming a gate contact barrier layer on the gate structure;
forming a gate contact intervening layer on the gate contact barrier layer which comprises titanium nitride;
exposing the gate contact intervening layer to pulses of a germanium-containing reducing agent in a hydrogen environment to form a layer of germanium on the gate contact intervening layer; and
exposing the layer of germanium to pulses of a tungsten-containing precursor to form a gate contact filler layer on the gate contact barrier layer;
wherein the gate contact barrier layer comprises a columnar grain structure;
wherein the gate contact intervening layer comprises tungsten silicide, and a thickness of the gate contact intervening layer is greater than about 4.1 nm;
wherein the gate contact filler layer comprises alpha phase tungsten.