# US 12,014,950 B2 · Method for forming semiconductor structure and semiconductor structure

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- Number: US 12,014,950 B2
- Document ID: US12014950B2
- Status: Granted
- Kind: B2
- Application number: 17/446,290
- Filed: 2021-08-27
- Published: 2022-03-31
- Granted: 2024-06-18
- Earliest claimed: 2020-09-30
- Assignees: Changxin Memory Technologies, Inc.
- Applicants: Changxin Memory Technologies, Inc.
- Inventors: Shang Gao
- Web page: https://patentgrep.com/patent/US12014950B2

## CPC

- H10W 10/014: {using trench refilling with dielectric materials, e.g. shallow trench isolations}
- H10B 12/00: Dynamic random access memory [DRAM] devices
- H10D 62/115: {Dielectric isolations, e.g. air gaps}
- H10P 14/6339: {deposition by cyclic CVD, e.g. ALD, ALE or pulsed CVD}
- H10P 14/6506: {Formation of intermediate materials}
- H10P 14/6514: {by exposure to a plasma}
- H10P 14/6522: {introduced into a nitride material, e.g. changing SiN to SiON}
- H10P 14/6532: {by exposure to a plasma}
- H10P 14/69215: {the material being a silicon oxide, e.g. SiO2}
- H10P 14/69433: {the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz}
- H10W 10/011: {of isolation regions comprising dielectric materials}
- H10W 10/0121: {in regions recessed from the surface, e.g. in trenches or grooves}
- H10W 10/10: Isolation regions comprising dielectric materials
- H10W 10/13: formed using local oxidation of silicon [LOCOS], e.g. sealed interface localised oxidation [SILO] or side-wall mask isolation [SWAMI]
- H10W 10/17: formed using trench refilling with dielectric materials, e.g. shallow trench isolations
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10B: ELECTRONIC MEMORY DEVICES
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10

## Abstract

A method for forming a semiconductor structure includes the following steps: providing a substrate having a trench in a surface; forming an isolation layer on the surface of the substrate, the isolation layer covering a side wall and a bottom wall of the trench; pretreating the isolation layer such that an initial oxide layer is formed on a surface of the isolation layer; forming an advanced oxide layer on a surface of the initial oxide layer with an atomic layer deposition process; and forming a dielectric layer on a surface of the advanced oxide layer with a spin-on dielectrics (SOD) process such that the dielectric layer fills the trench.

## Claims

### Claim 1

A method for forming a semiconductor structure, comprising
steps of:
providing a substrate having a trench in a surface of the substrate;
forming an isolation layer on the surface of the substrate, the isolation layer covering a side wall and a bottom wall of the trench;
pretreating the isolation layer such that an initial oxide layer is formed on a surface of the isolation layer;
forming an advanced oxide layer on a surface of the initial oxide layer with an atomic layer deposition process; and
forming a dielectric layer on a surface of the advanced oxide layer with a spin-on dielectrics (SOD) process such that the dielectric layer fills the trench.

### Claim 2 (depends on 1)

The method for forming the semiconductor structure of claim 1, wherein
the step of pretreating the isolation layer comprises: pretreating a surface of the isolation layer by using plasma oxygen to form an initial oxide layer on the surface of the isolation layer.

### Claim 3 (depends on 2)

The method for forming the semiconductor structure of claim 2, wherein
in the step of forming the initial oxide layer, radio frequency power of the plasma oxygen is 80 W to 120 W.

### Claim 4 (depends on 2)

The method for forming the semiconductor structure of claim 2, wherein
in the step of forming the initial oxide layer, a flow velocity of the plasma oxygen is 2 slm to 10 slm.

### Claim 5 (depends on 2)

The method for forming the semiconductor structure of claim 2, wherein
in the step of forming the initial oxide layer, the initial oxide layer is formed on the surface of the isolation layer with a plurality of cycles of pretreatment with the plasma oxygen on the surface of the isolation layer.

### Claim 6 (depends on 5)

The method for forming the semiconductor structure of claim 5, wherein
in the step of forming the initial oxide layer, the plurality of cycles of the pretreatment with the plasma oxygen is 2 to 5.

### Claim 7 (depends on 5)

The method for forming the semiconductor structure of claim 5, wherein
in the step of forming the initial oxide layer, a duration of each cycle of the pretreatment with the plasma oxygen is 5 min to 15 min.

### Claim 8 (depends on 1)

The method for forming the semiconductor structure of claim 1, wherein
a material of the initial oxide layer is same as a material of the advanced oxide layer.

### Claim 9 (depends on 1)

The method for forming the semiconductor structure of claim 1, wherein
in the step of forming the advanced oxide layer, a plurality of layers of oxide materials are deposited on a surface of the oxide thin film structure with a plurality of cycles of atomic layer deposition, so as to form the advanced oxide layer.

### Claim 10 (depends on 1)

The method for forming the semiconductor structure of claim 1, wherein
a ratio of a thickness of the initial oxide layer to a thickness of the advanced oxide layer is 1:5 to 1:20.

### Claim 11 (depends on 10)

The method for forming the semiconductor structure of claim 10, wherein
the ratio of the thickness of the initial oxide layer to the thickness of the advanced oxide layer is 1:10.

### Claim 12 (depends on 1)

The method for forming the semiconductor structure of claim 1, wherein
a material of the initial oxide layer comprises silicon dioxide.

### Claim 13 (depends on 1)

The method for forming the semiconductor structure of claim 1, wherein
a material of the advanced oxide layer comprises silicon dioxide.

### Claim 14 (depends on 1)

The method for forming the semiconductor structure of claim 1, wherein
a material of the isolation layer comprises silicon nitride.