# US 12,014,923 B2 · Methods for making radio frequency (RF) semiconductor devices including a ground plane layer having a superlattice

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- Number: US 12,014,923 B2
- Document ID: US12014923B2
- Status: Granted
- Kind: B2
- Application number: 18/213,120
- Filed: 2023-06-22
- Published: 2023-11-02
- Granted: 2024-06-18
- Earliest claimed: 2021-03-03
- Assignees: Atomera Incorporated
- Applicants: Atomera Incorporated
- Inventors: Hideki Takeuchi; Robert J. Mears
- Web page: https://patentgrep.com/patent/US12014923B2

## CPC

- H10D 62/8162: {having quantum effects only in the vertical direction, i.e. layered structures having quantum effects solely resulting from vertical potential variation}
- H10P 14/3252: {Alternating layers, e.g. superlattice}
- H10D 30/0323: {comprising monocrystalline silicon}
- H10D 30/601: {having lightly-doped drain or source extensions, e.g. LDD IGFETs or DDD IGFETs (lightly doped source or drain extensions for TFTs H10D30/6715)}
- H10D 30/6704: {having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device}
- H10D 30/6744: {Monocrystalline silicon}
- H10D 30/6758: {characterised by the insulating substrates}
- H10D 30/751: {having composition variations in the channel regions}
- H10D 62/8164: {comprising only semiconductor materials (potential variation in long-range structurally-disordered materials H10D62/8163)}
- H10P 14/3211: {Silicon, silicon germanium or germanium}
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10

## Abstract

A method for making a radio frequency (RF) semiconductor device may include forming an RF ground plane layer on a semiconductor-on-insulator substrate and including a conductive superlattice. The conductive superlattice may include stacked groups of layers, with each group of layers including stacked doped base semiconductor monolayers defining a doped base semiconductor portion, and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent doped base semiconductor portions. The method may further include forming a body above the RF ground plane layer, forming spaced apart source and drain regions adjacent the body and defining a channel region in the body, and forming a gate overlying the channel region.

## Claims

### Claim 1

A method for making a radio frequency (RF) semiconductor device comprising:
forming an RF ground plane layer on a semiconductor-on-insulator substrate by at least
doping the semiconductor layer of the semiconductor-on-insulator substrate, and
forming a superlattice on the doped semiconductor layer, the superlattice comprising a plurality of stacked groups of layers, each group of layers comprising a plurality of stacked base semiconductor monolayers defining a base semiconductor portion, and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions;
forming a body above the RF ground plane layer;
forming spaced apart source and drain regions adjacent the body and defining a channel region in the body; and
forming a gate overlying the channel region.

### Claim 2 (depends on 1)

The method of claim 1 wherein the RF semiconductor device comprises an RF switch.

### Claim 3 (depends on 1)

The method of claim 1 comprising forming a body contact coupled to the body and the RF ground plane layer.

### Claim 4 (depends on 3)

The method of claim 3 wherein the body contact comprises first and second body contact portions adjacent opposite ends of the channel region.

### Claim 5 (depends on 1)

The method of claim 1 wherein the RF ground plane has a thickness in a range of 10-50 nm.

### Claim 6 (depends on 1)

The method of claim 1 wherein the base semiconductor portions have a dopant concentration of at least 5×1017 cm−3.

### Claim 7 (depends on 1)

The method of claim 1 wherein forming the gate comprises forming a gate insulator over the channel region, and forming a gate electrode over the gate insulator.

### Claim 8 (depends on 1)

The method of claim 1 wherein the base semiconductor monolayers comprise silicon.

### Claim 9 (depends on 1)

The method of claim 1 wherein the non-semiconductor monolayers comprise oxygen.

### Claim 10 (depends on 1)

The method of claim 1 wherein the semiconductor-on-insulator substrate comprises a silicon-on-insulator (SOI) substrate.

### Claim 11

A method for making a radio frequency (RF) semiconductor device comprising:
forming an RF ground plane layer on a silicon-on-insulator (SOI) substrate by at least
doping the silicon layer of the SOI substrate, and
forming a superlattice on the doped silicon layer, the superlattice comprising a plurality of stacked groups of layers, each group of layers comprising a plurality of stacked base silicon monolayers defining a base silicon portion, and at least one oxygen monolayer constrained within a crystal lattice of adjacent base silicon portions;
forming a body above the RF ground plane layer;
forming spaced apart source and drain regions adjacent the body and defining a channel region in the body; and
forming a gate overlying the channel region.

### Claim 12 (depends on 11)

The method of claim 11 wherein the RF semiconductor device comprises an RF switch.

### Claim 13 (depends on 11)

The method of claim 11 further comprising forming a body contact coupled to the body and the RF ground plane layer.

### Claim 14 (depends on 13)

The method of claim 13 wherein the body contact comprises first and second body contact portions adjacent opposite ends of the channel region.

### Claim 15 (depends on 11)

The method of claim 11 wherein the RF ground plane has a thickness in a range of 10-50 nm.

### Claim 16 (depends on 11)

The method of claim 11 wherein the base silicon portions have a dopant concentration of at least 5×1017 cm−3.

### Claim 17 (depends on 11)

The method of claim 11 wherein forming the gate comprises forming a gate insulator over the channel region, and forming a gate electrode over the gate insulator.

### Claim 18

A method for making a radio frequency (RF) switch comprising:
forming an RF ground plane layer on a semiconductor-on-insulator substrate by at least
doping the semiconductor layer of the semiconductor-on-insulator substrate, and
forming a superlattice on the doped semiconductor layer, the superlattice comprising a plurality of stacked groups of layers, each group of layers comprising a plurality of stacked base semiconductor monolayers defining a base semiconductor portion, and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions;
forming a body above the RF ground plane layer;
forming a body contact coupled to the body and the RF ground plane layer;
forming spaced apart source and drain regions adjacent the body and defining a channel region in the body; and
forming a gate overlying the channel region for controlling charge carrier flow through the channel region responsive to an RF switching control signal.

### Claim 19 (depends on 18)

The method of claim 18 wherein the body contact comprises first and second body contact portions adjacent opposite ends of the channel region.

### Claim 20 (depends on 18)

The method of claim 18 wherein the RF ground plane has a thickness in a range of 10-50 nm.

### Claim 21 (depends on 18)

The method of claim 18 wherein the base semiconductor portions have a dopant concentration of at least 5×1017 cm−3.

### Claim 22 (depends on 18)

The method of claim 18 wherein forming the gate comprises forming a gate insulator over the channel region, and forming a gate electrode over the gate insulator.

### Claim 23 (depends on 18)

The method of claim 18 wherein the base semiconductor monolayers comprise silicon, and the non-semiconductor monolayers comprise oxygen.