# US 12,014,793 B2 · Method of screening non-volatile memory cells

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- Number: US 12,014,793 B2
- Document ID: US12014793B2
- Status: Granted
- Kind: B2
- Application number: 17/858,185
- Filed: 2022-07-06
- Published: 2023-10-19
- Granted: 2024-06-18
- Earliest claimed: 2022-04-13
- Assignees: Silicon Storage Technology, Inc.
- Applicants: Silicon Storage Technology, Inc.
- Inventors: Viktor Markov; Alexander Kotov
- Web page: https://patentgrep.com/patent/US12014793B2

## CPC

- G11C 29/50016: {of retention}
- G11C 16/14: Circuits for erasing electrically, e.g. erase voltage switching circuits
- G11C 16/26: Sensing or reading circuits; Data output circuits
- G11C 16/3445: {Circuits or methods to verify correct erasure of nonvolatile memory cells}
- G11C 16/349: {Arrangements for evaluating degradation, retention or wearout, e.g. by counting erase cycles}
- G11C 29/50004: {of threshold voltage}
- G11C 2029/5004: {Voltage}
- G11C 2029/5006: {Current}
- G11C: STATIC STORES (semiconductor memory devices H10B)

## Abstract

A method for screening memory cells includes erasing the memory cells, weakly programming the memory cells to a modified erased state, performing a first read operation on the memory cells after the erasing and the weakly programming, screening any of the memory cells that exhibit a read current during the first read operation below a margin read current threshold M1, baking the memory cells after the first read operation, performing a second read operation on the memory cells after the baking, and screening any of the memory cells that exhibit a read current during the second read operation below the margin read current threshold M1.

## Claims

### Claim 1

A method for screening memory cells, comprising:
erasing the memory cells;
weakly programming the memory cells to a modified erased state;
performing a first read operation on the memory cells after the erasing and the weakly programming;
screening any of the memory cells that exhibit a read current during the first read operation below a margin read current threshold M1;
baking the memory cells after the first read operation;
performing a second read operation on the memory cells after the baking; and
screening any of the memory cells that exhibit a read current during the second read operation below the margin read current threshold M1.

### Claim 2 (depends on 1)

The method of claim 1, wherein the margin read current threshold M1 is greater than a read reference current used to determine an erased state of the memory cells during a nominal read operation.

### Claim 3 (depends on 1)

The method of claim 1, wherein:
each of the memory cells includes a control gate;
the performing of the first read operation includes applying a first read voltage to the control gates that is equal to a nominal read voltage for the control gates; and
the performing of the second read operation includes applying the first read voltage to the control gates.

### Claim 4 (depends on 1)

The method of claim 1, wherein:
each of the memory cells includes a control gate;
the performing of the first read operation includes applying a first read voltage to the control gates that is less than a nominal read voltage for the control gates; and
the performing of the second read operation includes applying a second read voltage to the control gates that is less than the nominal read voltage for the control gates and greater than the first read voltage.

### Claim 5

A method for screening memory cells, comprising:
erasing the memory cells;
weakly programming the memory cells to a modified erased state;
performing a first read operation on the memory cells after the erasing and the weakly programming;
screening any of the memory cells that exhibit a read current during the first read operation below a margin read current threshold M1;
baking the memory cells after the first read operation;
performing a second read operation on the memory cells after the baking; and
screening any of the memory cells that exhibit a read current during the second read operation below a margin read current threshold M2;
wherein the margin read current thresholds M1 and M2 are greater than a read reference current used to determine an erased state of the memory cells during a nominal read operation, and the margin read current threshold M2 is less than the margin read current threshold M1.

### Claim 6 (depends on 5)

The method of claim 5, wherein:
each of the memory cells includes a control gate;
the performing of the first read operation includes applying a first read voltage to the control gates that is less than a nominal read voltage for the control gates; and
the performing of the second read operation includes applying a second read voltage to the control gates that is less than the nominal read voltage for the control gates and greater than the first read voltage.

### Claim 7

A method for screening memory cells, comprising:
strongly erasing the memory cells, wherein each of the memory cells includes a control gate;
performing a first read operation on the memory cells, after the strongly erasing, that includes applying a first read voltage to the control gates that is below a nominal read voltage for the control gates;
screening any of the memory cells that exhibit a read current during the first read operation below a margin read current threshold M1;
weakly programming the memory cells to a modified erased state;
performing a second read operation on the memory cells, after the weakly programming, that includes applying a second read voltage to the control gates that is below a nominal read voltage for the control gates and greater than the first read voltage;
screening any of the memory cells that exhibit a read current during the second read operation below the margin read current threshold M1;
baking the memory cells after the second read operation;
performing a third read operation on the memory cells, after the baking, that includes applying a third read voltage to the control gates that is below the nominal read voltage for the control gates and greater than the second read voltage; and
screening any of the memory cells that exhibit a read current during the third read operation below the margin read current threshold M1.

### Claim 8 (depends on 7)

The method of claim 7, wherein the margin read current threshold M1 is greater than a read reference current used to determine an erased state of the memory cells during a nominal read operation.

### Claim 9

A method for screening memory cells, comprising:
strongly erasing the memory cells, wherein each of the memory cells includes a control gate;
performing a first read operation on the memory cells, after the strongly erasing, that includes applying a first read voltage to the control gates that is below a nominal read voltage for the control gates;
screening any of the memory cells that exhibit a read current during the first read operation below a margin read current threshold M1;
weakly programming the memory cells to a modified erased state;
performing a second read operation on the memory cells, after the weakly programming, that includes applying a second read voltage to the control gates that is below a nominal read voltage for the control gates and greater than the first read voltage;
screening any of the memory cells that exhibit a read current during the second read operation below a margin read current threshold M2;
baking the memory cells after the second read operation;
performing a third read operation on the memory cells, after the baking, that includes applying a third read voltage to the control gates that is below the nominal read voltage for the control gates and greater than the second read voltage; and
screening any of the memory cells that exhibit a read current during the third read operation below a margin read current threshold M3;
wherein the margin read current thresholds M1, M2 and M3 are greater than a read reference current used to determine an erased state of the memory cells during a nominal read operation, the margin read current threshold M3 is less than the margin read current threshold M2, and the margin read current threshold M2 is less than the margin read current threshold M1.