# US 12,014,777 B2 · Non-volatile memory and operating method thereof > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 12,014,777 B2 - Document ID: US12014777B2 - Status: Granted - Kind: B2 - Application number: 17/568,622 - Filed: 2022-01-04 - Published: 2022-06-09 - Granted: 2024-06-18 - Earliest claimed: 2020-12-07 - Assignees: Yangtze Memory Technologies Co., Ltd. - Applicants: Yangtze Memory Technologies Co., Ltd. - Inventors: Li Xiang; Weihua Shi - Web page: https://patentgrep.com/patent/US12014777B2 ## CPC - G11C 16/08: Address circuits; Decoders; Word-line control circuits - G11C 5/145: {Applications of charge pumps; Boosted voltage circuits; Clamp circuits therefor (G11C5/141 takes precedence)} - G11C 16/0483: {comprising cells having several storage transistors connected in series} - G11C 16/30: Power supply circuits - G11C 16/32: Timing circuits - G11C 16/3427: {Circuits or methods to prevent or reduce disturbance of the state of a memory cell when neighbouring cells are read or written} - G11C 16/24: Bit-line control circuits - G11C: STATIC STORES (semiconductor memory devices H10B) ## Abstract The present application discloses a non-volatile memory and an operating method of the non-volatile memory. The non-volatile memory includes a plurality of memory cells, and unselected word lines connected with the memory cells. The method includes applying a first voltage rising at a first slope to unselected word lines to charge the unselected word lines, and stopping applying the first voltage to the unselected word lines in response to that the first voltage rises to a predetermined voltage. The predetermined voltage is higher than a pass voltage of a plurality of memory cells connected with the unselected word lines. ## Claims ### Claim 1 A method of operating a non-volatile memory, the non-volatile memory comprising a plurality of memory cells, and unselected word lines connected with the plurality of memory cells, the method comprising: applying a first voltage rising at a first slope to the unselected word lines to charge the unselected word lines and to allow a second voltage on the unselected word lines to rise at a second slope, the first slope being greater than the second slope; and stopping applying the first voltage to the unselected word lines in response to the first voltage rising at the first slope to reach a predetermined voltage, wherein the predetermined voltage is higher than a pass voltage of the plurality of memory cells connected with the unselected word lines. ### Claim 2 (depends on 1) The method of claim 1, wherein the second voltage is not higher than the pass voltage when the first voltage rises to the predetermined voltage. ### Claim 3 (depends on 2) The method of claim 2, wherein the second voltage is greater than 85% of the pass voltage when the first voltage rises to the predetermined voltage. ### Claim 4 (depends on 1) The method of claim 1, wherein the non-volatile memory further comprises a comparator; and applying the first voltage rising at the first slope to the unselected word lines comprises: inputting a ramp voltage rising with time, and a boosted drive voltage to the comparator to allow the comparator to output a pulse signal; and determining whether to apply the first voltage to the unselected word lines based on the pulse signal. ### Claim 5 (depends on 4) The method of claim 4, wherein a level of the pulse signal is high when the ramp voltage is lower than the boosted drive voltage; and the level of the pulse signal is low when the ramp voltage is higher than or equal to the boosted drive voltage. ### Claim 6 (depends on 5) The method of claim 5, wherein the boosted drive voltage is 7 V. ### Claim 7 (depends on 4) The method of claim 4, wherein the ramp voltage is lower than the boosted drive voltage before the first voltage rises to the predetermined voltage; and the ramp voltage is higher than the boosted drive voltage after the first voltage rises to the predetermined voltage. ### Claim 8 (depends on 4) The method of claim 4, wherein the non-volatile memory further comprises a voltage source, and a first switch cell receiving the pulse signal from the comparator; and determining whether to apply the first voltage to the unselected word lines based on the pulse signal comprises electrically connecting the voltage source with the unselected word lines through the first switch cell in response to the pulse signal inputted to the first switch cell being at a high level, to allow the voltage source to apply the first voltage to the unselected word lines. ### Claim 9 (depends on 8) The method of claim 8, wherein determining whether to apply the first voltage to the unselected word lines based on the pulse signal further comprises: disconnecting the first switch cell in response to the pulse signal inputted to the first switch cell being at a low level, to enable the voltage source to stop applying the first voltage to the unselected word lines. ### Claim 10 (depends on 4) The method of claim 4, wherein the non-volatile memory further comprises a drive circuit; and the method further comprises applying the pass voltage to the unselected word lines through the drive circuit when stopping applying the first voltage to the unselected word lines. ### Claim 11 (depends on 10) The method of claim 10, wherein the drive circuit comprises an error amplifier, and a plurality of resistors connected with the error amplifier; and wherein applying the pass voltage to the unselected word lines through the drive circuit comprises: inputting a reference voltage to a positive input terminal of the error amplifier; and outputting the pass voltage based on the reference voltage and resistance values of the plurality of resistors, and applying the pass voltage to the unselected word lines. ### Claim 12 (depends on 4) The method of claim 4, wherein the pulse signal is maintained at a high level before the first voltage rises to the predetermined voltage. ### Claim 13 (depends on 10) The method of claim 10, wherein the pulse signal is maintained at a low level after the first voltage rises to the predetermined voltage. ### Claim 14 (depends on 1) The method of claim 1, further comprising: outputting the pass voltage, lower than the predetermined voltage, to the unselected word lines after the first voltage reaches the predetermined voltage. ### Claim 15 A non-volatile memory, comprising: a plurality of memory cells; unselected word lines connected with the plurality of memory cells; a voltage generator configured to supply a first voltage to the unselected word lines; and a controller coupled to the voltage generator and controlling the voltage generator to: apply the first voltage rising at a first slope to the unselected word lines to charge the unselected word lines; stop applying the first voltage to the unselected word lines in response to the first voltage rising to a predetermined voltage, wherein the predetermined voltage is higher than a pass voltage of the plurality of memory cells connected with the unselected word lines; and allow a second voltage on the unselected word lines to rise at a second slope when applying the first voltage rising at the first slope to the unselected word lines, the first slope being greater than the second slope, and the second voltage being not higher than the pass voltage when the first voltage rises to the predetermined voltage. ### Claim 16 (depends on 15) The non-volatile memory of claim 15, wherein the second voltage is greater than 85% of the pass voltage when the first voltage rises to the predetermined voltage. ### Claim 17 (depends on 15) The non-volatile memory of claim 15, wherein the voltage generator further comprises a comparator; and the comparator is configured to: receive a ramp voltage rising with time, and a boosted drive voltage through the comparator to allow the comparator to output a pulse signal; and determine whether to apply the first voltage to the unselected word lines based on the pulse signal. ### Claim 18 (depends on 17) The non-volatile memory of claim 17, wherein a level of the pulse signal is high when the ramp voltage is lower than the boosted drive voltage; and the level of the pulse signal is low when the ramp voltage is higher than or equal to the boosted drive voltage. ### Claim 19 (depends on 18) The non-volatile memory of claim 18, wherein the boosted drive voltage is 7V. ### Claim 20 (depends on 17) The non-volatile memory of claim 17, wherein the ramp voltage is lower than the boosted drive voltage before the first voltage rises to the predetermined voltage; and the ramp voltage is higher than the boosted drive voltage after the first voltage rises to the predetermined voltage.