Intra-package memory die communication structures
AssigneeMicron Technology, Inc.
InventorHari Giduturi
Life of this patent
Estimating the term…
Abstract
A packaged memory device can include a primary memory die coupled to a shared intra-package communication bus and coupled to an external host device using a host interface bus, and the host interface bus can include a host clock channel. The memory device can include multiple secondary dies coupled to the intra-package communication bus, and each of the secondary dies can be configured to receive the same messages from the primary memory die using the intra-package communication bus. The primary memory die can send a first message to, or receive a first message from, a particular one of the secondary dies using the intra-package communication bus, and the first message can include a first chip identification field that exclusively indicates the particular one of the secondary dies.
Claims29
A packaged memory device comprising:
- a primary memory die coupled to a shared intra-package communication bus and coupled to an external host device using a host interface bus, wherein the host interface bus includes a host clock channel;
- and
- multiple secondary dies coupled to the intra-package communication bus, wherein each of the secondary dies is configured to receive the same messages from the primary memory die using the intra-package communication bus;
- wherein the primary memory die is configured to send a first message to, or receive a first message from, a particular one of the secondary dies using the intra-package communication bus, and the first message comprises a first chip identification field that exclusively indicates the particular one of the secondary dies;
- and
- wherein the intra-package communication bus includes an intra-package clock channel, and wherein a frequency of a host clock signal on the host clock channel is greater than a frequency of an intra-package clock signal on the intra-package clock channel.
A system comprising:
- a memory host device;
- and
- a packaged memory device coupled to the host device using a host interface;
- wherein the packaged memory device comprises multiple stacked memory dies coupled using a shared bus, including:
- a first die coupled to the host interface and the shared bus;
- a second die coupled to the shared bus, wherein the second die corresponds to a first chip identifier;
- and
- a third die coupled to the shared bus, wherein the third die corresponds to a second chip identifier;
- wherein the first die is configured to use a selected one of the first and second chip identifier to communicate, via the shared bus, with the corresponding one of the second die and the third die;
- wherein a clock rate of the host interface is greater than a clock rate of the shared bus.
A method for communication between a primary die and one or more secondary dies in a packaged memory device, the method comprising:
- at the one or more secondary devices, monitoring a data input channel of a shared package bus;
- and
- at the primary die, sending a first message to a particular one of the secondary devices using the shared package bus, wherein the first message comprises:
- a command field including one or more bits specifying a memory operation;
- and
- a chip identification field including one or more bits configured to distinguish the particular one of the secondary devices from other secondary devices that are coupled to the same shared package bus.
A packaged memory device comprising:
- a primary memory die coupled to a shared intra-package communication bus and coupled to an external host device using a host interface bus, wherein the host interface bus includes a host clock channel;
- and
- multiple secondary dies coupled to the intra-package communication bus and decoupled from the host interface bus, wherein each of the secondary dies is configured to receive the same messages from the primary memory die using the intra-package communication bus;
- and wherein each of the secondary dies comprises respective logic circuitry configured to determine whether to respond to or disregard one or more of the messages from the primary memory die.
Dependencies are inferred from the claim text.