# US 12,010,873 B2 · Pixel, stage circuit and organic light emitting display device having the pixel and the stage circuit > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 12,010,873 B2 - Document ID: US12010873B2 - Status: Granted - Kind: B2 - Application number: 17/967,397 - Filed: 2022-10-17 - Published: 2023-02-02 - Granted: 2024-06-11 - Earliest claimed: 2016-07-01 - Assignees: Samsung Display Co., Ltd. - Applicants: Samsung Display Co., Ltd. - Inventors: Ji Hyun Ka; Han Sung Bae; Won Kyu Kwak - Web page: https://patentgrep.com/patent/US12010873B2 ## CPC - H10K 59/1213: {the pixel elements being TFTs} - G09G 3/3233: with pixel circuitry controlling the current through the light-emitting element - H10D 86/421: {having a particular composition, shape or crystalline structure of the active layer} - H10D 86/423: {comprising semiconductor materials not belonging to the Group IV, e.g. InGaZnO} - H10D 86/60: wherein the TFTs are in active matrices - H10K 59/123: Connection of the pixel electrodes to the thin film transistors [TFT] - H10K 59/131: Interconnections, e.g. wiring lines or terminals - G09G 2300/0814: used for selection purposes, e.g. logical AND for partial update - G09G 2300/0819: used for counteracting undesired variations, e.g. feedback or autozeroing - G09G 2300/0861: with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes - G09G 2310/0248: Precharge or discharge of column electrodes before or after applying exact column voltages - G09G 2310/0286: Details of a shift registers arranged for use in a driving circuit - G09G 2310/061: for resetting or blanking - G09G 2310/08: Details of timing specific for flat panels, other than clock recovery - H10K: ORGANIC ELECTRIC SOLID-STATE DEVICES - G09G: ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION (arrangements for transferring data between digital computers and displays G06F3/14; static indicating arrangements comprising an association of a number of separate sources or light control cells G09F9/00; static indicating arrangements comprising integral associations of a number of light sources H01J, H01K, H10H, H05B33/12; scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission, details thereof H04N1/00) - H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES ## Abstract A pixel includes a pixel circuit and an organic light emitting diode. The pixel circuit has first, second, third, and fourth transistors. The first transistor controls an amount of current flowing from a first driving power supply coupled to a first node to a second driving power supply through the organic light emitting diode. The turns on when a scan signal is supplied to a first scan line. The third transistor turns on when a scan signal is supplied to a second scan line. The fourth transistor turns on when a scan signal is supplied to a third scan line. The first transistor is a p-type Low Temperature Poly-Silicon thin film transistor and the third transistor and the fourth transistor are n-type oxide semiconductor thin film transistors. ## Claims ### Claim 1 A pixel, comprising: an organic light emitting diode; a first transistor having a first electrode coupled to a first node and a second electrode coupled to an anode electrode of the organic light emitting diode, the first transistor to control an amount of driving current flowing from a first driving power supply (ELVDD) coupled to the first node to a second driving power supply (ELVSS) through the organic light emitting diode; a second transistor coupled between a data line and the first node, and a gate electrode of the second transistor coupled to a first scan line; a third transistor coupled between a gate electrode and the second electrode of the first transistor, and a gate electrode of the third transistor coupled to a second scan line, wherein each of the first transistor and the second transistor includes an active layer including polysilicon, the third transistor include an active layer including an oxide semiconductor material, and a first scan signal sun lied to the first scan line and a second scan signal supplied to the second scan line are set to signals laving opposite polarities and overlapping. ### Claim 2 (depends on 1) The pixel as claimed in claim 1, wherein the first scan signal is set to a low voltage and the second scan signal is set to a high voltage. ### Claim 3 (depends on 1) The pixel as claimed in claim 1, further comprising: a fourth transistor coupled between the gate electrode of the first transistor and an initialization power supply; and a gate electrode of the fourth transistor coupled to a third scan line, wherein the fourth transistor includes an active layer including an oxide semiconductor material and a third scan signal is supplied to the third scan line. ### Claim 4 (depends on 3) The pixel as claimed in claim 3, wherein the first scan signal and the third scan signal are not overlapped. ### Claim 5 (depends on 3) The pixel as claimed in claim 3, wherein the first scan line, the second scan line, and the third scan lines are different scan lines. ### Claim 6 (depends on 3) The pixel as claimed in claim 3, further comprising: a second node connected to the gate electrode of the first transistor, the third transistor, the fourth transistor, and a storage capacitor, wherein at least two transistors directly connected to the second node are oxide semiconductor thin film transistors. ### Claim 7 (depends on 6) The pixel as claimed in claim 6, wherein the second node is coupled between an active layer including an oxide semiconductor material of the third transistor and a first electrode of the storage capacitor, and a second electrode of the storage capacitor is connected to the first driving power supply (ELVDD). ### Claim 8 (depends on 3) The pixel as claimed in claim 3, further comprising: a fifth transistor coupled between the first driving power supply (ELVDD) and the first node, and a gate electrode of the fifth transistor coupled to a light emission control line, wherein the fifth transistor is a p-type LTPS thin film transistor. ### Claim 9 (depends on 8) The pixel as claimed in claim 8, wherein the first node is connected to the fifth transistor, the first transistor, and the second transistor. ### Claim 10 (depends on 8) The pixel as claimed in claim 8, further comprising: a sixth transistor coupled between the second electrode of the first transistor and the anode electrode of the organic light emitting diode, and a gate electrode of the sixth transistor coupled to the light emission control line, wherein the sixth transistor is a p-type a Low Temperature Poly-Silicon (LTPS) thin film transistor. ### Claim 11 (depends on 10) The pixel as claimed in claim 10, wherein each of the first transistor, the fifth transistor, and the sixth transistor is a p-type LTPS thin film transistor and includes an active layer including polysilicon. ### Claim 12 (depends on 1) The pixel as claimed in claim 1, wherein a transistor including an oxide semiconductor material places the first transistor in a diode-connected state in response to the transistor being turned on. ### Claim 13 A pixel, comprising: an organic light emitting diode; a first transistor having a first electrode coupled to a first node and a second electrode coupled to an anode electrode of the organic light emitting diode, the first transistor to control an amount of driving current flowing from a first driving power supply (ELVDD) coupled to the first node to a second driving power supply (ELVSS) through the organic light emitting diode; a second transistor coupled between a data line and the first node, and a gate electrode of the second transistor coupled to a first scan line; a third transistor having an active layer including an oxide semiconductor material, the third transistor coupled between a gate electrode and the second electrode of the first transistor, and a gate electrode of the third transistor coupled to a second scan line; and a fourth transistor coupled between the gate electrode of the first transistor and an initialization power supply, and a gate electrode of the fourth transistor coupled to a third scan line, wherein the first transistor and the second transistor are Low Temperature Poly-Silicon (LTPS) thin film transistors, and the third transistor and fourth transistor are oxide semiconductor thin film transistors. ### Claim 14 (depends on 13) The pixel as claimed in claim 13, wherein the first scan line, the second scan line, and the third scan lines are different scan lines. ### Claim 15 (depends on 13) The pixel as claimed in claim 13, further comprising: a fifth transistor coupled between the first driving power supply (ELVDD) and the first node, and a gate electrode of the fifth transistor coupled to a light emission control line, wherein the fifth transistor is a p-type LTPS thin film transistor. ### Claim 16 (depends on 15) The pixel as claimed in claim 15, wherein the first node is connected to the fifth transistor, the first transistor, and the second transistor. ### Claim 17 (depends on 15) The pixel as claimed in claim 15, further comprising: a sixth transistor coupled between the second electrode of the first transistor and the anode electrode of the organic light emitting diode, and a gate electrode of the sixth transistor coupled to the light emission control line, wherein the sixth transistor is a p-type LTPS thin film transistor. ### Claim 18 (depends on 17) The pixel as claimed in claim 17, wherein the fifth transistor, the first transistor, and the sixth transistor in the driving current flowing from the first driving power supply (ELVDD) coupled to the first node to the second driving power supply (ELVSS) through the organic light emitting diode are LTPS transistors, and all transistors directly connected to the gate electrode of the first transistor are oxide semiconductor thin film transistors. ### Claim 19 (depends on 13) The pixel as claimed in claim 13, further comprising: a second node connected to a storage capacitor, the gate electrode of the first transistor, the third transistor, and the fourth transistor. ### Claim 20 (depends on 13) The pixel as claimed in claim 13, wherein when the second transistor is turned on, the first transistor is in a diode-connected state. ### Claim 21 (depends on 19) The pixel as claimed in claim 19, wherein when the first transistor is turned on and in a diode connected state, a data signal supplied to the first node passes to the second node via the first transistor.