# US 12,010,846 B2 · Semiconductor device and electronic system including the same > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 12,010,846 B2 - Document ID: US12010846B2 - Status: Granted - Kind: B2 - Application number: 17/476,711 - Filed: 2021-09-16 - Published: 2022-06-30 - Granted: 2024-06-11 - Earliest claimed: 2020-12-28 - Assignees: Samsung Electronics Co., Ltd. - Applicants: Samsung Electronics Co., Ltd. - Inventors: Sungkweon Baek; Hakseon Kim; Jaehwa Seo - Web page: https://patentgrep.com/patent/US12010846B2 ## CPC - H10B 43/27: the channels comprising vertical portions, e.g. U-shaped channels - H10D 30/601: {having lightly-doped drain or source extensions, e.g. LDD IGFETs or DDD IGFETs (lightly doped source or drain extensions for TFTs H10D30/6715)} - H10B 41/27: the channels comprising vertical portions, e.g. U-shaped channels - H10B 41/41: of a memory region comprising a cell select transistor, e.g. NAND - H10B 43/40: characterised by the peripheral circuit region - H10B 43/50: characterised by the boundary region between the core and peripheral circuit regions - H10D 62/126: {Top-view geometrical layouts of the regions or the junctions} - H10D 62/151: {of IGFETs (of IGFETs having LDD or DDD structure H10D30/601; of thin film transistors H10D30/6713)} - H10B: ELECTRONIC MEMORY DEVICES - H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES ## Abstract A transistor of a semiconductor device includes an isolation region, an active region disposed in the isolation region, a gate extending in a second direction on the active region, and source and drain regions respectively extending in a first direction perpendicular to the second direction in the active region on first and second sides of the gate. The source and drain regions include low-concentration source and drain doping regions including first and second low-concentration source and drain doping regions The source and drain regions further include high-concentration source and drain doping regions respectively disposed in the low-concentration source and drain doping regions and having higher doping concentrations than the low-concentration source and drain doping regions. A first length in the second direction of the first low-concentration source and drain doping regions is greater than a second length in the second direction of the second low-concentration source and drain doping regions. ## Claims ### Claim 1 A semiconductor device comprising: a substrate; a peripheral circuit including a plurality of transistors disposed on the substrate; and a memory cell array controlled by the peripheral circuit, wherein each of the plurality of transistors includes: an isolation region disposed on the substrate; an active region disposed in the isolation region; a gate extending in a second direction on the active region; and source and drain regions respectively extending in a first direction perpendicular to the second direction in the active region on first and second sides of the gate, wherein the source and drain regions include: low-concentration source and drain doping regions including first low-concentration source and drain doping regions disposed in a gate-adjacent region adjacent to the gate and second low-concentration source and drain doping regions disposed in a gate-distant region separated from the gate by the gate-adjacent region; and high-concentration source and drain doping regions respectively disposed in the low-concentration source and drain doping regions and having higher doping concentrations than the low-concentration source and drain doping regions, and wherein a first length in the second direction of the first low-concentration source and drain doping regions is greater than a second length in the second direction of the second low-concentration source and drain doping regions. ### Claim 2 (depends on 1) The semiconductor device of claim 1, wherein the first low-concentration source and drain doping regions are spaced apart by a first separation distance in the second direction from a first edge located inside upper and lower sides of the isolation region in the second direction, and the second low-concentration source and drain doping regions are spaced apart by a second separation distance greater than the first separation distance in the second direction from a second edge located inside the upper and lower sides of the isolation region in the second direction. ### Claim 3 (depends on 2) The semiconductor device of claim 2, wherein: the first edge includes a first upper edge located above the isolation region and a first lower edge located below the isolation region in the second direction; the first separation distance includes a first upper separation distance spaced apart from the first upper edge in the second direction; the first separation distance further includes a first lower separation distance spaced apart from the first lower edge in the second direction; and the first upper separation distance is equal to the first lower separation distance. ### Claim 4 (depends on 2) The semiconductor device of claim 2, wherein: the second edge includes a second upper edge located above the isolation region and a second lower edge located below the isolation region in the second direction; the second separation distance includes a second upper separation distance spaced apart from the second upper edge in the second direction; the second separation distance further includes a second lower separation distance spaced apart from the second lower edge in the second direction; and the second upper separation distance is equal to the second lower separation distance. ### Claim 5 (depends on 2) The semiconductor device of claim 2, wherein: the first low-concentration source and drain doping regions include a first low-concentration drain doping region disposed in the gate-adjacent region the first side of the gate; the first edge includes a first drain upper edge located above the isolation region and a first drain lower edge located below the isolation region in the second direction; the first separation distance further includes a first drain upper separation distance from the first drain upper edge to the first low-concentration drain doping region in the second direction; the first separation distance further includes a first drain lower separation distance from the first drain lower edge to the first low-concentration drain doping region in the second direction; and the first drain upper separation distance is different from the first drain lower separation distance. ### Claim 6 (depends on 2) The semiconductor device of claim 2, wherein: the second low-concentration source and drain doping regions include a second low-concentration drain doping region disposed in the gate-distant region on the first side of the gate; the second edge includes a second drain upper edge located above the isolation region and a second drain lower edge located below the isolation region; the second separation distance further includes a second drain upper separation distance from the second drain upper edge to the second low-concentration drain doping region in the second direction; the second separation distance further includes second drain lower separation distance from the second drain lower edge to the second low-concentration drain doping region in the second direction; and the second drain upper separation distance is different from the second drain lower separation distance. ### Claim 7 (depends on 1) The semiconductor device of claim 1, wherein the second low-concentration source and drain doping regions are spaced apart from a side edge located on an inner side of the isolation region in the first direction. ### Claim 8 (depends on 1) The semiconductor device of claim 1, wherein the high-concentration source and drain doping regions are surrounded by the first low-concentration source and drain doping regions and the second low-concentration source and drain doping regions. ### Claim 9 (depends on 1) The semiconductor device of claim 1, wherein: the second low-concentration source and drain doping regions include a second low-concentration source doping region located in the gate-distant region disposed on the first side of the gate; the second low-concentration source and drain doping regions further include a second low-concentration drain doping region located in the gate-distant region disposed on the second side of the gate; the second low-concentration source doping region contacts a second side edge located on an inner side of the isolation region; and the second low-concentration drain doping region is spaced apart from a first side edge located on an inner side of the isolation region in the first direction. ### Claim 10 (depends on 1) The semiconductor device of claim 1, wherein the high-concentration source and drain doping regions have greater doping depths than the low-concentration source and drain doping regions. ### Claim 11 A semiconductor device comprising: a peripheral circuit including a plurality of transistors, wherein each of the plurality of transistors includes: a gate extending in a second direction on an active region defined by an isolation region; and source and drain regions respectively extending in a first direction perpendicular to the second direction in the active region on first and second sides of the gate in the first direction, wherein the source and drain regions include: low-concentration source and drain doping regions including first low-concentration source and drain doping regions disposed in a gate-adjacent region adjacent to the gate and second low-concentration source and drain doping regions disposed in a gate-distant region separated from the gate by the gate-adjacent region; and high-concentration source and drain doping regions having higher doping concentrations than the low-concentration source and drain doping regions, and wherein a first length in the second direction of the first low-concentration source and drain doping regions is greater than a second length in the second direction of the second low-concentration source and drain doping regions. ### Claim 12 (depends on 11) The semiconductor device of claim 11, wherein the first low-concentration source and drain doping regions and the second low-concentration source and drain doping regions on the first side of the gate respectively have a symmetrical structure as the first low-concentration source and drain doping regions and the second low-concentration source and drain doping regions on the second side of the gate. ### Claim 13 (depends on 11) The semiconductor device of claim 11, wherein the first low-concentration source and drain doping regions and the second low-concentration source and drain doping regions on the first side of the gate respectively have an asymmetric structure as the first low-concentration source and drain doping regions and the second low-concentration source and drain doping regions on the second side of the gate. ### Claim 14 (depends on 11) The semiconductor device of claim 11, wherein the high-concentration source and drain doping regions are surrounded by the first low-concentration source and drain doping regions and the second low-concentration source and drain doping regions. ### Claim 15 (depends on 11) The semiconductor device of claim 11, wherein the first low-concentration source and drain doping regions are spaced apart by a first separation distance in the second direction from a first edge located inside upper and lower sides of the isolation region, and the second low-concentration source and drain doping regions are spaced apart by a second separation distance greater than the first separation distance in the second direction from a second edge located inside the upper and lower sides of the isolation region. ### Claim 16 (depends on 11) The semiconductor device of claim 11, wherein the second low-concentration source and drain doping regions are spaced apart from a side edge inside a side surface of the isolation region in the first direction. ### Claim 17 (depends on 11) The semiconductor device of claim 11, wherein: the second low-concentration source and drain doping regions include a second low-concentration source doping region disposed in the gate-distant region on one side of the gate, the second low-concentration source and drain doping regions further include a second low-concentration drain doping region located in the gate-distant region on another side of the gate; the second low-concentration source doping region contacts a second side edge located on an inner side of the isolation region; and the second low-concentration drain doping region is spaced apart from a first side edge located on an inner side of the isolation region in the first direction. ### Claim 18 (depends on 11) The semiconductor device of claim 11, wherein the high-concentration source and drain doping regions have greater doping depths than the low-concentration source and drain doping regions. ### Claim 19 An electronic system comprising: a main substrate; a semiconductor device disposed on the main substrate; and a controller electrically connected to the semiconductor device, wherein the semiconductor device includes a peripheral circuit including a plurality of transistors, wherein each of the plurality of transistors includes: a gate extending in a second direction on an active region defined by an isolation region; and source and drain regions respectively extending in a first direction perpendicular to the second direction in the active region on first and second sides of the gate, wherein the source and drain regions include: low-concentration source and drain doping regions including first low-concentration source and drain doping regions disposed in a gate-adjacent region adjacent to the gate and second low-concentration source and drain doping regions disposed in a gate-distant region separated from the gate by the gate-adjacent region; and high-concentration source and drain doping regions having higher doping concentrations than the low-concentration source and drain doping regions, and wherein a first length in the second direction of the first low-concentration source and drain doping regions is greater than a second length in the second direction of the second low-concentration source and drain doping regions. ### Claim 20 (depends on 19) The electronic system of claim 19, wherein the first low-concentration source and drain doping regions are spaced apart by a first separation distance in the second direction from a first edge inside the isolation region, and the second low-concentration source and drain doping regions are spaced apart by a second separation distance greater than the first separation distance in the second direction from a second edge inside the isolation region.