# US 12,010,313 B2 · Architecture, method and system for video and arithmetic coding

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- Number: US 12,010,313 B2
- Document ID: US12010313B2
- Status: Granted
- Kind: B2
- Application number: 17/670,360
- Filed: 2022-02-11
- Published: 2022-05-26
- Granted: 2024-06-11
- Earliest claimed: 2017-01-03
- Assignees: Avago Technologies International Sales Pte. Limited
- Applicants: Avago Technologies International Sales Pte. Limited
- Inventors: Minhua Zhou
- Web page: https://patentgrep.com/patent/US12010313B2

## CPC

- H04N 19/13: Adaptive entropy coding, e.g. adaptive variable length coding [AVLC] or context adaptive binary arithmetic coding [CABAC]
- H04N 19/119: Adaptive subdivision aspects, e.g. subdivision of a picture into rectangular or non-rectangular coding blocks
- H04N 19/126: Details of normalisation or weighting functions, e.g. normalisation matrices or variable uniform quantisers
- H04N 19/159: Prediction type, e.g. intra-frame, inter-frame or bidirectional frame prediction
- H04N 19/52: by predictive encoding
- H04N 19/61: in combination with predictive coding
- H04N 19/91: Entropy coding, e.g. variable length coding [VLC] or arithmetic coding
- H04N: PICTORIAL COMMUNICATION, e.g. TELEVISION

## Abstract

In an example architecture flexible arithmetic coding system, coding circuitry of a device may receive video data that is to be coded (e.g., to be encoded or decoded) by arithmetic coding. The coding circuitry may compute at least one of a least probable symbol (LPS) range or a most probable symbol (MPS) range based on a multiplication operation. The coding circuitry may perform arithmetic coding on the video data using the at least one of the LPS range or the MPS range. Arithmetic coding may be binary arithmetic coding. The computation of the LPS range or the MPS range using the multiplication operation may reduce computational cost.

## Claims

### Claim 1

A device, comprising:
one or more processors configured to cause:
receiving video data;
determining a quantized range by right shifting a first range by a first shift number;
determining a first value by right shifting a probability state by a second shift number;
determining a least probable symbol (LPS) range based on at least a multiplication operation and a shift operation using a third shift number, wherein the multiplication operation is based on the quantized range, the first value, and a storage precision of the probability state, and wherein the LPS range is clipped into a range based on a storage precision of the first range;
performing arithmetic decoding on the video data based on the LPS range, the quantized range, and an offset; and
providing the decoded video data.

### Claim 2 (depends on 1)

The device of claim 1, wherein prior to performing the arithmetic decoding on the video data, the one or more processors are configured to cause:
determining a second range by subtracting the LPS range from the first range; and
based on the offset and the second range, determining whether to modify the offset.

### Claim 3 (depends on 2)

The device of claim 2, wherein prior to determining whether to modify the offset, the one or more processors are configured to cause performing a comparison based on the offset and the second range.

### Claim 4 (depends on 2)

The device of claim 2, wherein the one or more processors are configured to cause modifying the offset based on the second range.

### Claim 5 (depends on 1)

The device of claim 1, wherein each of the first shift number and the second shift number is predefined.

### Claim 6 (depends on 1)

The device of claim 1, wherein the one or more processors are configured to cause performing the multiplication operation before performing the shift operation, wherein the shift operation uses the third shift number.

### Claim 7 (depends on 1)

The device of claim 1, wherein determining the LPS range comprises determining the LPS range based further on a fourth shift number.

### Claim 8 (depends on 1)

The device of claim 1, wherein prior to performing the arithmetic decoding on the video data, the one or more processors are configured to cause:
determining a second range by subtracting the LPS range from the first range;
performing a comparison based on the offset and the second range; and
based on the comparison, determining a bin value.

### Claim 9 (depends on 8)

The device of claim 8, wherein:
the video data is associated with a bin; and
the bin value is zero or one.

### Claim 10 (depends on 8)

The device of claim 8, wherein the one or more processors are configured to cause:
updating a value associated with the probability state, based on the bin value.

### Claim 11 (depends on 1)

. The device of claim 1, wherein the one or more processors are configured to cause re-normalizing the offset.

### Claim 12 (depends on 1)

The device of claim 1, wherein:
the quantized range is a quantized compound range;
the first range is a first compound range;
the first shift number is a first range shift number; and
the second shift number is a probability state shift number.

### Claim 13 (depends on 1)

The device of claim 1, wherein the one or more processors are configured to cause performing the following in parallel:
determining the quantized range; and
determining the first value.

### Claim 14 (depends on 1)

The device of claim 1, wherein:
the one or more processors comprise a video coding component;
the device further comprises a communication interface and a memory; and
the video coding component is configured to receive the video data from another device via the communication interface or from the memory.

### Claim 15 (depends on 14)

The device of claim 14, wherein:
the device further comprises a host processor;
the video coding component is coupled to the communication interface;
the host processor is coupled to the communication interface, the video coding component, and the memory;
the host processor comprises logic, circuitry, and code, and the host processor is configured to enable processing data or controlling operations of the device; and
the memory is configured to enable storage of information including one or more of the video data, the decoded video data, and configuration information.

### Claim 16 (depends on 15)

The device of claim 15, wherein:
the host processor is configured to provide control signals to one or more of the communication interface, the video coding component, and the memory;
the video coding component comprises a video encoder circuit and a video decoder circuit; and
the video data comprises compressed video data.

### Claim 17

A method, comprising:
receiving video data;
determining a quantized range by right shifting a first range by a first shift number;
determining a first value by right shifting a probability state by a second shift number;
determining a least probable symbol (LPS) range based on a multiplication operation and a shift operation using a third shift number, wherein the multiplication operation is based on the quantized range, the first value, and a storage precision of the probability state, and wherein the LPS range is clipped into a range based on a storage precision of the first range;
performing arithmetic decoding on the video data based on the LPS range, the quantized range, and an offset; and
providing the decoded video data.

### Claim 18 (depends on 17)

The method of claim 17, wherein prior to performing the arithmetic decoding on the video data, the method comprises:
determining a second range by subtracting the LPS range from the first range; and
based on the offset and the second range, determining whether to modify the offset.

### Claim 19 (depends on 18)

The method of claim 18, further comprising modifying the offset based on the second range.

### Claim 20 (depends on 17)

The method of claim 17, wherein each of the first shift number, the second shift number and the third shift number is predefined.

### Claim 21 (depends on 17)

The method of claim 17, wherein the multiplication operation is performed before the shift operation is performed.

### Claim 22 (depends on 17)

The method of claim 17, wherein determining the LPS range comprises determining the LPS range based further on a fourth shift number.

### Claim 23

One or more non-transitory, processor-readable storage media comprising instructions that, when read by one or more processors, cause performing a method comprising:
receiving video data;
determining a quantized range by right shifting a first range by a first shift number;
determining a first value by right shifting a probability state by a second shift number;
determining a least probable symbol (LPS) range based on a multiplication operation and a shift operation using a third shift number, wherein the multiplication operation is based on the quantized range, the first value, and a storage precision of the probability state;
performing arithmetic decoding on the video data based on the LPS range, the quantized range, and an offset; and
providing the decoded video data.

### Claim 24 (depends on 23)

The one or more non-transitory, processor-readable storage media of claim 23, wherein prior to performing the arithmetic decoding on the video data, the method comprises:
determining a second range by subtracting the LPS range from the first range; and
based on the offset and the second range, determining whether to modify the offset.

### Claim 25 (depends on 23)

The one or more non-transitory, processor-readable storage media of claim 23, wherein determining the LPS range comprises determining the LPS range based further on a fourth shift number.