# US 12,010,231 B2 · Computer processing architecture and method for supporting multiple public-key cryptosystems based on exponentiation > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 12,010,231 B2 - Document ID: US12010231B2 - Status: Granted - Kind: B2 - Application number: 17/605,380 - Filed: 2021-06-23 - Published: 2022-12-29 - Granted: 2024-06-11 - Earliest claimed: 2021-06-23 - Assignees: PQSecure Technologies, LLC - Applicants: PQSecure Technologies, LLC - Inventors: Brian C. Koziel; Rami El-Khatib - Web page: https://patentgrep.com/patent/US12010231B2 ## CPC - H04L 9/3066: {involving algebraic varieties, e.g. elliptic or hyper-elliptic curves} - G06F 21/602: {Providing cryptographic facilities or services} - H04L 2209/12: Details relating to cryptographic hardware or logic circuitry - H04L 2209/122: Hardware reduction or efficient architectures - H04L: TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION (arrangements common to telegraphic and telephonic communication H04M) - G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N) ## Abstract A computer processing system have includes a processing unit operably configured to perform a plurality of exponentiation operations and a cryptosystem controller operably configured to load an exponent from the at least one exponentiation operation from a memory to an algorithm controller by first applying a function, wherein the algorithm controller including at least one set of shift registers operably configured to shift a plurality of digits and operably configured to utilize at least one of the plurality of digits as an output. ## Claims ### Claim 1 A computer processing system for efficiently implementing exponentiation for multiple public key cryptosystems comprising: a processing unit operably configured to perform a plurality of exponentiation operations with different schemes utilizing at least one of a modular exponentiation operation and a scalar point multiplication operation and from at least one of the following group and over any parameter set: X25519, X448, Ed25519, and Ed448 and to perform at least one of the following group of key exchange mechanisms: DH, DSA, ECDH, ECDSA, ECJPAKE, EdDSA, SIKE, SIDH, CSIDH, SQISign; and a cryptosystem controller operably configured to load an exponent or a scalar from the at least one of modular exponentiation operation and the scalar point multiplication operation from a memory to an algorithm controller by first applying an encoding function configured to covert the exponent or scalar to a plurality of digits represented in the exponent or the scalar, the algorithm controller: including at least one set of shift registers operably configured to shift the plurality of digits received from the encoding function and operably configured to utilize at least one of the plurality of digits as an output utilized in multiple iterations of the at least one of the modular exponentiation operation and the scalar point multiplication operation; and operably configured to read the output and dictate a subroutine of operations forming part of the at least one of the modular exponentiation operation and the scalar point multiplication operation. ### Claim 2 (depends on 1) The computer processing system according to claim 1, wherein: the algorithm controller including at least one set of single direction shift registers operably configured to be initialized from the output of the encoding function. ### Claim 3 (depends on 2) The computer processing system according to claim 2, wherein: the encoding function is operably configured to be performed by a computing processing system external to the algorithm controller. ### Claim 4 (depends on 2) The computer processing system according to claim 2, wherein: the algorithm controller is operably configured to load and process a sequence of portions of the exponent when there are fewer shift registers than a total length of the exponent. ### Claim 5 (depends on 1) The computer processing system according to claim 1, wherein: the at least one set of shift registers are operably configured to perform circular shifts. ### Claim 6 (depends on 1) The computer processing system according to claim 1, wherein: the processing unit is operably configured to perform left-to-right and right-to-left algorithms for the plurality of exponentiation operations. ### Claim 7 (depends on 1) The computer processing system according to claim 1, wherein: the processing unit is operably configured to perform a plurality of at least one of modular exponentiation and/or at least one of scalar point multiplication operation. ### Claim 8 (depends on 1) The computer processing system according to claim 1, wherein: the algorithm controller including a set of multiple direction shift registers operably configured to shift in a plurality of directions that are dictated by the algorithm controller. ### Claim 9 (depends on 1) The computer processing system according to claim 1, wherein: the algorithm controller including a plurality of sets of single direction shift registers operably configured to share to the at least one of the plurality of digits as the output. ### Claim 10 (depends on 1) The computer processing system according to claim 1, wherein: the algorithm controller including a plurality of sets of single direction shift registers operably configured to feed the at least one of the plurality of digits to a multiplexer that is operably configured to select the output. ### Claim 11 A computer-implemented method for efficiently implementing a plurality of exponentiation operations in a computer processing cryptosystem comprising the steps of: providing a processing unit operably configured to perform a plurality of exponentiation operations with different schemes utilizing at least one of a modular exponentiation operation and a scalar point multiplication operation; initializing memory and control units for the at least one of the modular exponentiation operation and the scalar point multiplication operation and from at least one of the following group and over any parameter set: X25519, X448, Ed25519, and Ed448; initializing memory and control units for the at least one of the modular exponentiation operation and the scalar point multiplication operation; utilizing, in the computer processing cryptosystem, at least one of the following group of key exchange mechanisms: DH, DSA, ECDH, ECDSA, ECJPAKE, EdDSA, SIKE, SIDH, CSIDH, SQISign; issuing an exponentiation unit to a computer processing cryptosystem; applying an encoding function to generate an output by converting an exponent or a scalar used in the at least one of the modular exponentiation operation and the scalar point multiplication operation from its original form to a plurality digits represented in the exponent or the scalar; initializing the algorithm controller's shift registers based on the output from the encoding function; shifting the shift registers in the algorithm controller in a sequence dictated by the at least one of the modular exponentiation operation and the scalar point multiplication operation; and performing iterations of subroutines, wherein the algorithm controller shifts operations to fulfill the at least one of the modular exponentiation operation and the scalar point multiplication operation and, after an iteration, the registers shift such that each flip-flop to hold a bit of a previous flip-flop and the most significant flip-flop's value can be discarded or pushed to a least significant flip-flop.