# US 12,010,215 B2 · Calculating hash values

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- Number: US 12,010,215 B2
- Document ID: US12010215B2
- Status: Granted
- Kind: B2
- Application number: 17/674,015
- Filed: 2022-02-17
- Published: 2022-09-01
- Granted: 2024-06-11
- Earliest claimed: 2021-03-01
- Assignees: Infineon Technologies AG
- Applicants: Infineon Technologies AG
- Inventors: Martin Schlaeffer
- Web page: https://patentgrep.com/patent/US12010215B2

## CPC

- H04L 9/0643: {Hash functions, e.g. MD5, SHA, HMAC or f9 MAC}
- G06F 12/1018: involving hashing techniques, e.g. inverted page tables
- G06F 12/1408: {by using cryptography (for digital transmission H04L9/00)}
- H04L 9/3239: {involving non-keyed hash functions, e.g. modification detection codes [MDCs], MD5, SHA or RIPEMD}
- G06F 12/0207: {with multidimensional access, e.g. row/column, matrix}
- H04L 2209/122: Hardware reduction or efficient architectures
- H04L: TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION (arrangements common to telegraphic and telephonic communication H04M)
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)

## Abstract

Determining hash values based on at least two types of hash functions, utilizing a memory that is arranged to store at least one state to be used to determine hash values pursuant to a SHA-3 function, wherein hash values pursuant to any of a SHA-2 function or a SHA-1 function are determined based on the state.

## Claims

### Claim 1

A device for determining hash values based on at least two types of hash functions, the device comprising:
a memory that is arranged to store at least one state to be used to determine hash values pursuant to a SHA-3 function, and
processing circuitry arranged to determine hash values pursuant to any of a SHA-2 function or a SHA-1 function based on the state,
wherein each of the states comprises bits that are arranged in a virtual data cube, wherein the virtual data cube comprises:
a number of z slices,
a number of y planes, and
a number of x sheets.

### Claim 2 (depends on 1)

The device of claim 1, wherein an input message of the SHA-2 function and chaining values of the SHA-2 function are stored in lanes of the state.

### Claim 3 (depends on 1)

The device of claim 1, wherein the processing circuitry is configured to compute an addition of the SHA-2 function in a slice-by-slice manner on the slices of the state.

### Claim 4 (depends on 1)

The device of claim 1, wherein the processing circuitry is configured to compute each of bitwise Boolean functions majority and choice of the SHA-2 function in a slice-by-slice manner on the slices of the state.

### Claim 5 (depends on 1)

The device of claim 1, wherein the processing circuitry is configured to compute sigma functions of SHA-2 function in a lane-by-lane manner on lanes of the state.

### Claim 6 (depends on 1)

The device of claim 1, wherein the state is part of a shared hardware, which further comprises a shared interface, shared data paths and/or a shared logic to determine the hash values.

### Claim 7 (depends on 1)

The device of claim 1, wherein the device is at least one of the following or is at least part of one of the following or comprises at least one of the following: an integrated circuit,
a hardware security module,
a trusted platform module,
a crypto unit,
a FPGA,
a processing unit,
a controller,
a smartcard.

### Claim 8

A method for determining hash values by a processing circuitry based on at least two types of hash functions, the method comprising:
using a shared memory comprising at least one state, wherein the structure of the state is capable for use in determining hash values pursuant to the SHA-3 function, and
determining hash values pursuant to any of a SHA-2 function or a SHA-1 function based on the structure of the state,
wherein each of the states comprises bits that are arranged in a virtual data cube, wherein the virtual data cube comprises:
a number of z slices,
a number of y planes, and
a number of x sheets.

### Claim 9

A computer program product directly loadable into a memory of a digital processing device, comprising software code portions for causing the digital processing device to:
use a shared memory comprising at least one state, wherein the structure of the state is capable for use in determining hash values pursuant to the SHA-3 function, and
determine hash values pursuant to any of a SHA-2 function or a SHA-1 function based on the structure of the state,
wherein each of the states comprises bits that are arranged in a virtual data cube, wherein the virtual data cube comprises:
a number of z slices,
a number of y planes, and
a number of x sheets.