# US 12,009,919 B2 · Error-tolerant forward error correction ordered set message decoder

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- Number: US 12,009,919 B2
- Document ID: US12009919B2
- Status: Granted
- Kind: B2
- Application number: 18/322,247
- Filed: 2023-05-23
- Published: 2023-09-21
- Granted: 2024-06-11
- Earliest claimed: 2021-03-19
- Assignees: Kandou Labs, S.A.
- Applicants: Kandou Labs SA
- Inventors: Filippo Borlenghi; David Stauffer
- Web page: https://patentgrep.com/patent/US12009919B2

## CPC

- H04L 1/0045: {Arrangements at the receiver end}
- H04L 1/0047: {Decoding adapted to other signal detection operation (in conjunction with sequence estimation or equalization H04L25/03286)}
- H04L 1/0061: {Error detection codes}
- G06F 13/4282: {on a serial bus, e.g. I2C bus, SPI bus (on daisy chain buses G06F13/4247)}
- G06F 2213/0042: Universal serial bus [USB]
- H03M 13/1515: {Reed-Solomon codes}
- H04L 1/0041: {Arrangements at the transmitter end}
- H04L 1/0057: {Block codes (H04L1/0061, H04L1/0064 take precedence)}
- H04L 1/0065: {Serial concatenated codes}
- H04L 1/0071: {Use of interleaving (interleaving per se H03M13/27)}
- H04L 7/041: {using special codes as synchronising signal}
- H04L 2001/0094: {Bus}
- H04L: TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION (arrangements common to telegraphic and telephonic communication H04M)
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)
- H03M: CODING; DECODING; CODE CONVERSION IN GENERAL (using fluidic means F15C4/00; optical analogue/digital converters G02F7/00; coding, decoding or code conversion, specially adapted for particular applications, see the relevant subclasses, e.g. G01D, G01R, G06F, G06T, G09G, G10L, G11B, G11C, H04B, H04L, H04M, H04N; ciphering or deciphering for cryptography or other purposes involving the need for secrecy G09C)

## Abstract

Methods are described for identifying and acting upon predetermined message patterns during reception of a data stream structured as USB message frames. A first embodiment performs pattern matching between received message bits and one or more predetermined sequences, identifying unscrambled ordered set messages. A second embodiment applies a descrambling operation and performs comparable pattern matching between descrambled received message bits and one or more additional predetermined sequences, identifying scrambled ordered set messages.

## Claims

### Claim 1

A method comprising:
receiving a data frame including a set of super symbols, a set of sync bits and a received forward error correction (FEC) parity word and calculating a local FEC parity word based on the received frame;
identifying an unscrambled ordered set (UOS) candidate in the set of super symbols by comparing portions of each super symbol to corresponding portions of one or more known UOS values;
responsive to the identification of the UOS candidate, halting advancement of a descrambler operation for a predetermined number of bit intervals associated with a length of the super symbol;
comparing the received FEC parity word to the local FEC parity word and determining at least one bit error occurred in the data frame, and responsively determining the UOS candidate is a true UOS; and
descrambling scrambled super symbols received in a subsequent data frame to identify scrambled ordered sets.

### Claim 2 (depends on 1)

The method of claim 1, wherein identifying the unscrambled ordered set (UOS) candidate in the set of super symbols by comparing the portions of each super symbol to corresponding portions of one or more known UOS values comprises determining at least 6 bytes of a given 8-byte super symbol match a corresponding 6 bytes of a known 8-byte UOS value.

### Claim 3 (depends on 1)

The method of claim 1, wherein identifying the unscrambled ordered set (UOS) candidate in the set of super symbols by comparing the portions of each super symbol to corresponding portions of one or more known UOS values comprises determining at least 14 bytes of a given 16-byte super symbol match a corresponding 16 bytes of a known 16-byte UOS value.

### Claim 4 (depends on 1)

The method of claim 1, further comprising setting a retimer device in a low power mode of operation responsive to identifying the scrambled ordered set in the subsequent data frame.

### Claim 5 (depends on 4)

The method of claim 4, wherein setting the retimer device in the low power mode of operation comprises powering down a circuit element selected from the group consisting of: a transmit driver, a phase-lock loop, and a clock-data recovery circuit.

### Claim 6 (depends on 4)

The method of claim 4, further comprising identifying a low-frequency power-up signal and responsively setting the retimer device in a high-speed data mode of operation.

### Claim 7 (depends on 1)

The method of claim 1, further comprising detecting, in a second data frame, a second UOS candidate;
halting advancement of the descrambling operation for the predetermined of unit intervals; and
comparing a second received FEC parity word to a second local FEC parity word and determining no bit errors occurred in the second data frame.

### Claim 8 (depends on 7)

The method of claim 7, further comprising checking a sync bit in the second data frame, and determining that the second UOS candidate is a true UOS candidate according to the sync bit.

### Claim 9 (depends on 7)

The method of claim 7, further comprising checking a sync bit in the second data frame, determining that the second UOS candidate is a false UOS candidate according to the sync bit, and advancing the descrambling operation.

### Claim 10 (depends on 1)

The method of claim 1, wherein the data frame is a universal serial bus (USB) data frame.

### Claim 11

A method comprising:
receiving a sequence of data frames, each data frame including a set of super symbols, a set of sync bits and a received forward error correction (FEC) parity word, and calculating a local FEC parity word based on the received frame;
identifying unscrambled ordered set (UOS) candidates in the set of super symbols by comparing portions of each super symbol to corresponding portions of one or more known UOS values;
comparing the local FEC parity word to the received FEC parity word to determine a successful FEC comparison indicating no bit errors are present in the data frame or a failed FEC comparison indicating at least one bit error is present in the data frame;
responsive to the identification of a UOS candidate in each data frame of the sequence of data frames, halting advancement of a descrambler operation for a length of a super symbol;
determining whether the UOS candidate in each data frame is a true UOS or a false UOS, wherein:
a true UOS is determined responsive to (i) the successful FEC comparison and a corresponding sync bit in the set of sync bits is asserted, or (ii) the failed FEC comparison; and
a false UOS corresponds to (i) the successful FEC comparison and a corresponding sync bit in the set of sync bits is de-asserted; and
advancing the descrambling operation responsive to identification of each false UOS.

### Claim 12 (depends on 11)

The method of claim 11, wherein identifying the unscrambled ordered set (UOS) candidate in the set of super symbols by comparing the portions of each super symbol to corresponding portions of one or more known UOS values comprises determining at least 6 bytes of a given 8-byte super symbol match a corresponding 6 bytes of a known 8-byte UOS value.

### Claim 13 (depends on 11)

The method of claim 11, wherein identifying the unscrambled ordered set (UOS) candidate in the set of super symbols by comparing the portions of each super symbol to corresponding portions of one or more known UOS values comprises determining at least 14 bytes of a given 16-byte super symbol match a corresponding 14 bytes of a known 16-byte UOS value.

### Claim 14 (depends on 11)

The method of claim 11, wherein the sequence of data frames are universal serial bus (USB) frames.

### Claim 15 (depends on 14)

The method of claim 14, wherein the USB frames are buffered in a retimer device.

### Claim 16 (depends on 15)

The method of claim 15, further comprising setting a retimer device in a low power mode of operation responsive to identifying the scrambled ordered set in the subsequent data frame.

### Claim 17 (depends on 16)

The method of claim 16, wherein setting the retimer device in the low power mode of operation comprises powering down a circuit element selected from the group consisting of: a transmit driver, a phase-lock loop, and a clock-data recovery circuit.

### Claim 18 (depends on 15)

The method of claim 15, further comprising identifying a low-frequency power-up signal and responsively setting the retimer device in a high-speed data mode of operation.

### Claim 19 (depends on 11)

The method of claim 11, wherein each data frame is buffered on a byte-wise basis.

### Claim 20 (depends on 11)

The method of claim 11, wherein each data frame is buffered on a super-symbol-wise basis.