# US 12,009,826 B1 · Phase noise suppression for reference oscillator > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 12,009,826 B1 - Document ID: US12009826B1 - Status: Granted - Kind: B1 - Application number: 17/983,253 - Filed: 2022-11-08 - Granted: 2024-06-11 - Earliest claimed: 2022-11-08 - Assignees: Anritsu Corporation - Applicants: Anritsu Company - Inventors: Nikolay Shtin; Oleksandr Chenakin; Suresh P. Ojha - Web page: https://patentgrep.com/patent/US12009826B1 ## CPC - H03L 7/093: using special filtering or amplification characteristics in the loop (H03L7/087 - H03L7/091 take precedence) - H03L 7/099: concerning mainly the controlled oscillator of the loop - H03L: AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES (generation of oscillations H03B) ## Abstract Circuits, methods, and apparatus that can reduce or suppress phase noise in a frequency synthesizer. A phase-noise-suppression system can detect phase noise in an input signal, amplify the detected phase noise, subtract the detected phase noise from the input signal, and provide an output signal having reduced phase noise. ## Claims ### Claim 1 A phase-noise-suppression system comprising: an input path comprising a first voltage-controlled phase shifter in series with a frequency multiplier, the input path having an input configured to couple to a signal source external to the phase-noise suppression system; a frequency discriminator having an input coupled to an output of the input path; a first amplifier path having an input coupled to an output of the frequency discriminator and an output coupled to a control input of the first voltage-controlled phase shifter; and a second amplifier path having an input coupled to the output of the frequency discriminator and an output coupled to a control input of the frequency discriminator. ### Claim 2 (depends on 1) The phase-noise-suppression system of claim 1 wherein the frequency discriminator comprises a dielectric resonator circuit. ### Claim 3 (depends on 2) The phase-noise-suppression system of claim 2 wherein an input of the frequency multiplier is coupled to an output of the first voltage-controlled phase shifter. ### Claim 4 (depends on 3) The phase-noise-suppression system of claim 3 wherein the input path further comprises a power amplifier coupled between the first voltage-controlled phase shifter and the frequency discriminator. ### Claim 5 (depends on 4) The phase-noise-suppression system of claim 4 wherein the first amplifier path comprises a high-pass filter and a first amplifier. ### Claim 6 (depends on 5) The phase-noise-suppression system of claim 5 wherein the second amplifier path comprises a low-pass filter and a second amplifier. ### Claim 7 (depends on 6) The phase-noise-suppression system of claim 6 wherein the input path further comprises an input filter having an output coupled to an input of the first voltage-controlled phase shifter. ### Claim 8 (depends on 7) The phase-noise-suppression system of claim 7 wherein the frequency discriminator comprises: a hybrid coupler coupled to an output of the power amplifier, the dielectric resonator circuit, and a low-noise amplifier; an attenuator coupled to the output of the power amplifier; and a phase detector coupled to the attenuator and the low-noise amplifier, and having an output coupled to the output of the frequency discriminator. ### Claim 9 (depends on 8) The phase-noise-suppression system of claim 8 further comprising a second voltage controlled phase shifter coupled between the attenuator and the phase detector. ### Claim 10 (depends on 9) The phase-noise-suppression system of claim 9 wherein the input filter comprises a bandpass filter. ### Claim 11 A phase-noise-suppression system comprising: an input path comprising a voltage-controlled phase shifter in series with a frequency multiplier, the input path having an input configured to couple to a signal source external to the phase-noise suppression system; a phase detector having an input coupled to an output of the input path; a dielectric resonator circuit having an input coupled to the output of the input path and an output coupled to the phase detector; a first amplifier path having an input coupled to an output of phase detector and an output coupled to a control input of the voltage-controlled phase shifter; and a second amplifier path having an input coupled to the output of the phase detector and an output coupled to a control input of the dielectric resonator circuit. ### Claim 12 (depends on 11) The phase-noise-suppression system of claim 11 wherein an input of the frequency multiplier is coupled to an output of the voltage-controlled phase shifter. ### Claim 13 (depends on 12) The phase-noise-suppression system of claim 12 wherein the input path further comprises a power amplifier coupled between the voltage-controlled phase shifter and the dielectric resonator circuit. ### Claim 14 (depends on 13) The phase-noise-suppression system of claim 13 wherein the first amplifier path comprises a high-pass filter and a first amplifier. ### Claim 15 (depends on 14) The phase-noise-suppression system of claim 14 wherein the second amplifier path comprises a low-pass filter and a second amplifier. ### Claim 16 A dielectric resonator circuit comprising: a base forming a cavity; a cavity lid over the cavity; a dielectric puck attached to the cavity lid; a printed circuit board over the cavity lid, the printed circuit board including a first slit formed in a ground plane and a second slit formed in the ground plane; a cover over the printed circuit board; a first micro strip line over the first slit; a second microstrip line over the second slit; a first varactor diode attached to the first micro strip line; a second varactor diode attached near a first end of the second microstrip line; and a third varactor diode attached near a second end of the second micro strip line. ### Claim 17 (depends on 16) The dielectric resonator circuit of claim 16 wherein the first microstrip line comprises a stub such that the first varactor diode is between the first slit and the stub. ### Claim 18 (depends on 17) The dielectric resonator circuit of claim 17 wherein the cavity lid comprises a first cutout aligned with the first slit and a second cutout aligned with the second slit. ### Claim 19 (depends on 18) The dielectric resonator circuit of claim 18 further comprising a rod connecting the dielectric puck to the cavity lid. ### Claim 20 (depends on 19) The dielectric resonator circuit of claim 19 wherein the rod is formed of a first ceramic and the dielectric puck is formed of a second ceramic, the first ceramic different from the second ceramic.