# US 12,009,821 B2 · Output driver and output buffer circuit including the same > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 12,009,821 B2 - Document ID: US12009821B2 - Status: Granted - Kind: B2 - Application number: 17/889,543 - Filed: 2022-08-17 - Published: 2023-05-18 - Granted: 2024-06-11 - Earliest claimed: 2021-11-16 - Assignees: Samsung Electronics Co., Ltd. - Applicants: Samsung Electronics Co., Ltd. - Inventors: Kyungsoo Lee - Web page: https://patentgrep.com/patent/US12009821B2 ## CPC - H03K 3/011: Modifications of generator to compensate for variations in physical values, e.g. voltage, temperature {(to maintain energy constant H03K3/015)} - H03K 19/00361: {in field effect transistor circuits} - H03K 3/012: Modifications of generator to improve response time or to decrease power consumption - H03K 17/6872: {using complementary field-effect transistors} - H03K 17/6874: {in a symmetrical configuration} - H03K: PULSE TECHNIQUE (measuring pulse characteristics G01R; modulating sinusoidal oscillations with pulses H03C; transmission of digital information H04L; discriminator circuits detecting phase difference between two signals by counting or integrating cycles of oscillation H03D3/04; automatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses where the type of generator is irrelevant or unspecified H03L; coding, decoding or code conversion, in general H03M) ## Abstract An output driver is provided. The output driver includes: a pull-up driver connected between an output power supply voltage and an output node, and configured to pull up a voltage at the output node based on a pull-up driving signal and a pull-up reference voltage; a pull-down driver connected between the output node and a ground voltage, and configured to pull down the voltage at the output node based on a pull-down driving signal and a pull-down reference voltage; and a reference voltage compensation circuit configured to perform a short operation during transitions of the pull-up driving signal and the pull-down driving signal, wherein the short operation includes electrically connecting any one or any combination of the pull-up reference voltage to the ground voltage, and the pull-down reference voltage to the output power supply voltage. ## Claims ### Claim 1 An output driver comprising: a pull-up driver connected between an output power supply voltage and an output node, and configured to pull up a voltage at the output node based on a pull-up driving signal and a pull-up reference voltage, wherein the pull-up reference voltage is generated by a voltage regulator which operates based on the output power supply voltage and a ground voltage; a pull-down driver connected between the output node and the ground voltage, and configured to pull down the voltage at the output node based on a pull-down driving signal and a pull-down reference voltage, wherein the pull-down reference voltage is generated by the voltage regulator; and a reference voltage compensation circuit configured to perform a short operation during transitions of the pull-up driving signal and the pull-down driving signal, wherein the short operation comprises electrically connecting any one or any combination of the pull-up reference voltage to the ground voltage, and the pull-down reference voltage to the output power supply voltage. ### Claim 2 (depends on 1) The output driver of claim 1, wherein the reference voltage compensation circuit is further configured to electrically connect the pull-up reference voltage and the ground voltage at rising edges of the pull-down driving signal. ### Claim 3 (depends on 1) The output driver of claim 1, wherein the reference voltage compensation circuit is further configured to electrically connect the pull-down reference voltage and the output power supply voltage at falling edges of the pull-up driving signal. ### Claim 4 (depends on 1) The output driver of claim 1, wherein the reference voltage compensation circuit is further configured to generate a pull-down short current at falling edges of the pull-down driving signal and a pull-up short current at rising edges of the pull-up driving signal. ### Claim 5 (depends on 1) The output driver of claim 1, wherein the reference voltage compensation circuit is further configured to control a short current which flows during the short operation based on an output impedance of the output driver. ### Claim 6 (depends on 1) The output driver of claim 1, wherein the reference voltage compensation circuit comprises: a pulse generation circuit configured to generate a pulse signal based on edges of the pull-up driving signal and the pull-down driving signal; and a switch circuit configured to perform the short operation based on the pulse signal. ### Claim 7 (depends on 6) The output driver of claim 6, wherein the pulse generation circuit comprises: a pull-up pulse generation circuit configured to generate a pull-up pulse signal based on rising edges of the pull-up driving signal; and a pull-down pulse generation circuit configured to generate a pull-down pulse signal based on falling edges of the pull-down pulse signal. ### Claim 8 (depends on 7) The output driver of claim 7, wherein the switch circuit comprises: a pull-up switch circuit configured to electrically connect the pull-down reference voltage and the output power supply voltage based on the pull-up pulse signal; and a pull-down switch circuit configured to electrically connect the pull-up reference voltage and the ground voltage based on the pull-down pulse signal. ### Claim 9 (depends on 8) The output driver of claim 8, wherein the pull-up switch circuit comprises at least one P-type transistor connected between the pull-down reference voltage and the output power supply voltage, and wherein the pull-down switch circuit comprises at least one N-type transistor connected between the pull-up reference voltage and the ground voltage. ### Claim 10 (depends on 1) The output driver of claim 1, wherein the reference voltage compensation circuit comprises a plurality of transistors connected in parallel between the pull-up reference voltage and the ground voltage or between the pull-down reference voltage and the output power supply voltage. ### Claim 11 (depends on 10) The output driver of claim 10, wherein the reference voltage compensation circuit further comprises a short current control circuit configured to control, based on an output impedance of the output driver, a number of transistors that are turned on, among the plurality of transistors, during the short operation. ### Claim 12 (depends on 1) The output driver of claim 1, wherein the pull-up driver comprises a pull-up driving transistor and a pull-up bias transistor connected by a cascode structure between the output power supply voltage and the output node, wherein a gate electrode of the pull-up driving transistor is configured to receive the pull-up driving signal, and a gate electrode of the pull-up bias transistor is configured to receive the pull-up reference voltage, and wherein the pull-down driver comprises a pull-down driving transistor and a pull-down bias transistor connected by a cascode structure between the output node and the ground voltage, wherein a gate electrode of the pull-down driving transistor is configured to receive the pull-down driving signal, and a gate electrode of the pull-down bias transistor is configured to receive the pull-down reference voltage. ### Claim 13 (depends on 12) The output driver of claim 12, wherein the pull-up driver further comprises a pull-up control transistor connected by a cascode structure with the pull-up driving transistor and the pull-up bias transistor between the output power supply voltage and the output node, wherein a gate electrode of the pull-up control transistor is configured to receive a pull-up control signal, and wherein the pull-down driver further comprises a pull-down control transistor connected by a cascode structure with the pull-down driving transistor and the pull-down bias transistor between the output node and the ground voltage, wherein a gate electrode of the pull-down control transistor is configured to receive a pull-down control signal. ### Claim 14 (depends on 13) The output driver of claim 13, further comprising: a dynamic control circuit configured to generate the pull-up control signal and the pull-down control signal based on transitions of an output signal at the output node. ### Claim 15 (depends on 1) The output driver of claim 1, wherein an output signal at the output node transitions between the output power supply voltage and the ground voltage. ### Claim 16 (depends on 15) The output driver of claim 15, wherein the pull-up driving signal transitions between the output power supply voltage and the pull-up reference voltage, wherein the pull-down driving signal transitions between the ground voltage and the pull-down reference voltage, wherein the pull-up reference voltage is lower than the output power supply voltage, and wherein the pull-down reference voltage is higher than the ground voltage. ### Claim 17 An output buffer circuit comprising: a level shifting circuit configured to generate a pull-up driving signal and a pull-down driving signal based on an input signal; and an output driver configured to generate an output signal at an output node based on the pull-up driving signal and the pull-down driving signal, wherein the output driver comprises: a pull-up driver connected between an output power supply voltage and the output node, and configured to pull up a voltage at the output node based on the pull-up driving signal and a pull-up reference voltage, wherein the pull-up reference voltage is generated by a voltage regulator which operates based on the output power supply voltage and a ground voltage; a pull-down driver connected between the output node and the ground voltage, and configured to pull down the voltage at the output node based on the pull-down driving signal and a pull-down reference voltage, wherein the pull-down reference voltage is generated by the voltage regulator; and a reference voltage compensation circuit configured to perform a short operation during transitions of the pull-up driving signal and the pull-down driving signal, wherein the short operation comprises electrically connecting any one or any combination of the pull-up reference voltage to the ground voltage and the pull-down reference voltage to the output power supply voltage. ### Claim 18 (depends on 17) The output buffer circuit of claim 17, wherein the level shifting circuit comprises: a first level shifter configured to generate the pull-down driving signal transitioning between the pull-down reference voltage and the ground voltage based on the input signal; and a second level shifter configured to generate the pull-up driving signal transitioning between the output power supply voltage and the pull-up reference voltage based on the pull-down driving signal. ### Claim 19 (depends on 17) The output buffer circuit of claim 17, wherein the reference voltage compensation circuit comprises: a pulse generation circuit configured to generate a pulse signal based on edges of the pull-up driving signal and the pull-down driving signal; and a switch circuit configured to perform the short operation based on the pulse signal. ### Claim 20 An output driver comprising: a pull-up driving transistor and a pull-up bias transistor connected by a cascode structure between an output power supply voltage and an output node, wherein a gate electrode of the pull-up driving transistor is configured to receive a pull-up driving signal, and a gate electrode of the pull-up bias transistor is configured to receive a pull-up reference voltage that is generated by a voltage regulator which operates based on the output power supply voltage and a ground voltage; a pull-down driving transistor and a pull-down bias transistor connected by a cascode structure between the output node and the ground voltage, wherein a gate electrode of the pull-down driving transistor is configured to receive a pull-down driving signal, and a gate electrode of the pull-down bias transistor is configured to receive a pull-down reference voltage that is generated by the voltage regulator; a first reference voltage compensation circuit configured to electrically connect the pull-up reference voltage to the ground voltage during transitions of the pull-down driving signal; and a second reference voltage compensation circuit configured to electrically connect the pull-down reference voltage to the output power supply voltage during transitions of the pull-up driving signal.