# US 12,009,820 B1 · Asynchronous consensus circuit with majority gate based on non-linear capacitors

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- Number: US 12,009,820 B1
- Document ID: US12009820B1
- Status: Granted
- Kind: B1
- Application number: 17/648,125
- Filed: 2022-01-14
- Granted: 2024-06-11
- Earliest claimed: 2022-01-13
- Assignees: Kepler Computing Inc.
- Applicants: Kepler Computing Inc.
- Inventors: Amrita Mathuriya; Nabil Imam; Ikenna Odinaka; Rafael Rios; Rajeev Kumar Dokania; Sasikanth Manipatruni
- Web page: https://patentgrep.com/patent/US12009820B1

## CPC

- H03K 19/0021: {Modifications of threshold (for electronic switching or gating H03K17/30)}
- G06F 13/1668: {Details of memory controller}
- G06F 30/398: Design verification or optimisation, e.g. using design rule check [DRC], layout versus schematics [LVS] or finite element methods [FEM] (optical proximity correction [OPC] design processes G03F1/36)
- G11C 11/221: {using ferroelectric capacitors}
- H03K 19/0008: {Arrangements for reducing power consumption}
- H03K 19/17744: {for input/output signals}
- H03K 19/17784: for supply voltage
- H03K 19/185: using dielectric elements with variable dielectric constant, e.g. ferro-electric capacitors
- H03K 19/23: Majority or minority circuits, i.e. giving output having the state of the majority or the minority of the inputs
- H10B 53/30: characterised by the memory core region
- H10D 1/684: {the dielectrics comprising multiple layers, e.g. comprising buffer layers, seed layers or gradient layers}
- H10P 14/69398: {the material having a perovskite structure, e.g. BaTiO3}
- H03K: PULSE TECHNIQUE (measuring pulse characteristics G01R; modulating sinusoidal oscillations with pulses H03C; transmission of digital information H04L; discriminator circuits detecting phase difference between two signals by counting or integrating cycles of oscillation H03D3/04; automatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses where the type of generator is irrelevant or unspecified H03L; coding, decoding or code conversion, in general H03M)
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)
- G11C: STATIC STORES (semiconductor memory devices H10B)
- H10B: ELECTRONIC MEMORY DEVICES
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10

## Abstract

Asynchronous circuit elements are described. Asynchronous circuit elements include a consensus element (c-element), completion tree, and validity tree. The c-element is implemented using adjustable threshold based multi-input capacitive circuitries. The completion tree comprises a plurality of c-elements organized in a tree formation. The validity tree comprises OR gates followed by c-elements. The multi-input capacitive circuitries include capacitive structures that may comprise linear dielectric, paraelectric dielectric, or ferroelectric dielectric. The capacitors can be planar or non-planar. The capacitors may be stacked vertically to reduce footprint of the various asynchronous circuitries.

## Claims

### Claim 1

An apparatus comprising:
a first input;
a second input;
a third input; and
a gate to receive the first input, the second input, and the third input, wherein the third input is coupled to an output of the gate, wherein the output is a consensus of the first input and the second input, and wherein the gate comprises:
a first capacitor having a first terminal connected to the first input, and a second terminal coupled to a summing node, wherein the first capacitor comprises a first nonlinear polar material;
a second capacitor having a third terminal connected to the second input, and a fourth terminal coupled to the summing node, wherein the first capacitor comprises a second nonlinear polar material;
a third capacitor having a fifth terminal connected to the third input, and a sixth terminal coupled to the summing node, wherein the third capacitor comprises a third nonlinear polar material; and
a device connected to the summing node and a supply rail, wherein the device has a gate terminal controllable by a control separate from the summing node.

### Claim 2 (depends on 1)

The apparatus of claim 1, wherein the first capacitor, the second capacitor, and the third capacitor are configured such that a voltage on the summing node is to reduce static leakage through the device.

### Claim 3 (depends on 2)

The apparatus of claim 2, wherein the voltage on the summing node is close to rail-to-rail.

### Claim 4 (depends on 1)

The apparatus of claim 1, wherein the first nonlinear polar material includes paraelectric material which includes one of: SrTiO3, TiO3 with Ba and Sr, HfZO2, Hf—Si—O, BaTiO3, La-substituted PbTiO3, lead zirconate titanate, or PMN-PT (lead magnesium niobate-lead titanate) based relaxor ferroelectrics.

### Claim 5 (depends on 1)

The apparatus of claim 1, wherein the first nonlinear polar material comprises a first ferroelectric material which includes one or more of:
bismuth ferrite (BFO), BFO with a first doping material, wherein the first doping material is one of Lanthanum or elements from lanthanide series of periodic table;
lead zirconium titanate (PZT) or PZT with a second doping material, wherein the second doping material is one of La or Nb;
a relaxor ferroelectric which includes one of: lead magnesium niobate (PMN), lead magnesium niobate-lead titanate (PMN-PT), lead lanthanum zirconate titanate (PLZT), lead scandium niobate (PSN), barium titanium-bismuth zinc niobium tantalum (BT-BZNT), or barium titanium-barium strontium titanium (BT-BST);
a perovskite which includes one of: BaTiO3, PbTiO3, KNbO3, or NaTaO3;
a first hexagonal ferroelectric which includes one of: YMnO3 or LuFeO3;
a second hexagonal ferroelectrics of a type h-RMnO3, where R is a rare earth element which includes one of: cerium (Ce), dysprosium (Dy), erbium (Er), europium (Eu), gadolinium (Gd), holmium (Ho), lanthanum (La), lutetium (Lu), neodymium (Nd), praseodymium (Pr), promethium (Pm), samarium (Sm), scandium (Sc), terbium (Tb), thulium (Tm), ytterbium (Yb), or yttrium (Y);
hafnium (Hf), zirconium (Zr), aluminum (Al), silicon (Si), their oxides or their alloyed oxides;
Hg1-xExOy, where E can be Al, Ca, Ce, Dy, Er, Gd, Ge, La, Sc, Si, Sr, Sn, or Y, where x and y are first and second fractions, respectively;
Al(1-x)Sc(x)N, Ga(1-x)Sc(x)N, Al(1-x)Y(x)N or Al(1-x-y)Mg(x)Nb(y)N, where x and y are third and fourth fractions, respectively;
HfO2 doped with one of: Al, Ca, Ce, Dy, Er, Gd, Ge, La, Sc, Si, Sr, Sn, or Y, wherein ‘x’ is a fraction;
niobate type compounds LiNbO3, LiTaO3, lithium iron tantalum oxy fluoride, barium strontium niobate, sodium barium niobate, or potassium strontium niobate; or
an improper ferroelectric which includes one of: [PTO/STO]n or [LAO/STO]n, where ‘n’ is between 1 and 100.

### Claim 6 (depends on 1)

The apparatus of claim 1, wherein the gate is to perform a majority or a minority function of the first input, the second input, and the third input.

### Claim 7 (depends on 1)

The apparatus of claim 1, wherein the device is turned on in a reset mode, and wherein the device is turned off in an evaluation mode separate from the reset mode.

### Claim 8

An apparatus comprising:
a first input;
a second input;
a third input;
a fourth input;
a fifth input; and
a gate to provide an output which is a consensus of the first input, the second input, and the third input, wherein:
the output is coupled to the fourth input and the fifth input;
the gate includes a plurality of capacitors that are coupled to the first input, the second input, the third input, the fourth input, and the fifth input;
the plurality of capacitors comprises nonlinear polar material; and
the gate includes a device connected to the gate and controllable by a control disconnected from the plurality of capacitors.

### Claim 9 (depends on 8)

The apparatus of claim 8, wherein the plurality of capacitors is configured such that a voltage on a summing node is to reduce static leakage through the device, wherein the plurality of capacitors is connected to the summing node.

### Claim 10 (depends on 9)

The apparatus of claim 9, wherein the voltage on the summing node is close to rail-to-rail.

### Claim 11 (depends on 8)

The apparatus of claim 8, wherein the nonlinear polar material includes paraelectric material which includes one of: SrTiO3, TiO3 with Ba and Sr, HfZrO2, Hf—Si—O, BaTiO3, La-substituted PbTiO3, lead zirconate titanate, or PMN-PT (lead magnesium niobate-lead titanate) based relaxor ferroelectrics.

### Claim 12 (depends on 8)

The apparatus of claim 8, wherein the nonlinear polar material includes ferroelectric material.

### Claim 13 (depends on 8)

The apparatus of claim 8, wherein the gate is to perform a majority or a minority function of the first input, the second input, the third input, the fourth input, and the fifth input.

### Claim 14 (depends on 8)

The apparatus of claim 8, wherein the device is turned on in a reset mode, and wherein the device is turned off in an evaluation mode separate from the reset mode.

### Claim 15

A system comprising:
a memory to store one or more instructions;
a processor circuitry to execute the one or more instructions; and
a communication device to allow the processor circuitry to communicate with another device, wherein the processor circuitry includes a consensus circuitry which comprises:
a first input;
a second input;
a third input; and
a gate to receive the first input, the second input, and the third input, wherein the third input is coupled to an output of the gate, wherein the output is a consensus of the first input and the second input, and wherein the gate comprises:
a first capacitor having a first terminal connected to the first input, and a second terminal coupled to a summing node, wherein the first capacitor comprises a first nonlinear polar material;
a second capacitor having a third terminal connected to the second input, and a fourth terminal coupled to the summing node, wherein the first capacitor comprises a second nonlinear polar material;
a third capacitor having a fifth terminal connected to the third input, and a sixth terminal coupled to the summing node, wherein the third capacitor comprises a third nonlinear polar material; and
a device connected to the summing node and a supply rail, wherein the device has a gate terminal controllable by a control separate from the summing node.

### Claim 16 (depends on 15)

The system of claim 15, wherein the first capacitor, the second capacitor, and the third capacitor are configured such that a voltage on the summing node is to reduce static leakage through the device.

### Claim 17 (depends on 16)

The system of claim 16, wherein the voltage on the summing node is close to rail-to-rail.

### Claim 18 (depends on 15)

The system of claim 15, wherein the first nonlinear polar material or the second nonlinear polar material includes paraelectric material which includes one of: SrTiO3, TiO3 with Ba and Sr, HfZrO2, Hf—Si—O, BaTiO3, La-substituted PbTiO3, lead zirconate titanate, or PMN-PT (lead magnesium niobate-lead titanate) based relaxor ferroelectrics.

### Claim 19 (depends on 15)

The system of claim 15, wherein the first nonlinear polar material comprises a first ferroelectric material which includes one or more of:
bismuth ferrite (BFO), BFO with a first doping material, wherein the first doping material is one of lanthanum or elements from lanthanide series of periodic table;
lead zirconium titanate (PZT) or PZT with a second doping material, wherein the second doping material is one of La or Nb;
a relaxor ferroelectric which includes one of: lead magnesium niobate (PMN), lead magnesium niobate-lead titanate (PMN-PT), lead lanthanum zirconate titanate (PLZT), lead scandium niobate (PSN), barium titanium-bismuth zinc niobium tantalum (BT-BZNT), or barium titanium-barium strontium titanium (BT-BST);
a perovskite which includes one of: BaTiO3, PbTiO3, KNbO3, or NaTaO3;
a first hexagonal ferroelectric which includes one of: YMnO3 or LuFeO3;
a second hexagonal ferroelectrics of a type h-RMnO3, where R is a rare earth element which includes one of: cerium (Ce), dysprosium (Dy), erbium (Er), europium (Eu), gadolinium (Gd), holmium (Ho), lanthanum (La), lutetium (Lu), neodymium (Nd), praseodymium (Pr), promethium (Pm), samarium (Sm), scandium (Sc), terbium (Tb), thulium (Tm), ytterbium (Yb), or yttrium (Y);
hafnium (Hf), zirconium (Zr), aluminum (Al), silicon (Si), their oxides or their alloyed oxides;
Hf1-xExOy, where E can be Al, Ca, Ce, Dy, Er, Gd, Ge, La, Sc, Si, Sr, Sn, or Y, where x and y are first and second fractions, respectively;
Al(1-x)Sc(x)N, Ga(1-x)Sc(x)N, Al(1-x)Y(x)N or Al(1-x-y)Mg(x)Nb(y)N, where x and y are third and fourth fractions, respectively;
HfO2 doped with one of: Al, Ca, Ce, Dy, Er, Gd, Ge, La, Sc, Si, Sr, Sn, or Y;
niobate type compounds LiNbO3, LiTaO3, lithium iron tantalum oxy fluoride, barium strontium niobate, sodium barium niobate, or potassium strontium niobate; or
an improper ferroelectric which includes one of: [PTO/STO]n or [LAO/STO]n, where ‘n’ is between 1 and 100.

### Claim 20 (depends on 15)

The system of claim 15, wherein the gate is to perform a majority or a minority function of the first input, the second input, and the third input.