# US 12,009,809 B2 · Drive module for GaN transistor, switch circuit and electronic device > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 12,009,809 B2 - Document ID: US12009809B2 - Status: Granted - Kind: B2 - Application number: 17/828,800 - Filed: 2022-05-31 - Published: 2023-11-30 - Granted: 2024-06-11 - Earliest claimed: 2022-05-31 - Assignees: Fudan University - Applicants: Fudan University - Inventors: Min Xu; Jian Jin; Mengyuan Sun; Bin Wang; Wei Zhang - Web page: https://patentgrep.com/patent/US12009809B2 ## CPC - H03K 17/161: {in field-effect transistor switches} - H03K 17/163: {Soft switching} - H03K: PULSE TECHNIQUE (measuring pulse characteristics G01R; modulating sinusoidal oscillations with pulses H03C; transmission of digital information H04L; discriminator circuits detecting phase difference between two signals by counting or integrating cycles of oscillation H03D3/04; automatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses where the type of generator is irrelevant or unspecified H03L; coding, decoding or code conversion, in general H03M) ## Abstract The present invention provides a drive module for a GaN transistor, including: a first pull-down transistor and a gate ringing and overshoot suppression unit, where the gate ringing and overshoot suppression unit and a first end of the first pull-down transistor are directly or indirectly connected to a gate of the GaN transistor, the gate ringing and overshoot suppression unit is connected between a second end of the first pull-down transistor and the ground; the gate ringing and overshoot suppression unit is configured to: when a gate voltage of the GaN transistor drops, control the release of a gate charge of the GaN transistor with a first impedance if the gate voltage is higher than a specified threshold; and control the release of the gate charge of the GaN transistor with a second impedance if the gate voltage is less than the specified threshold, where the first impedance is less than the second impedance. ## Claims ### Claim 1 A drive module for a GaN transistor, comprising a first pull-down transistor and a gate ringing and overshoot suppression unit, wherein: a first end of the first pull-down transistor is directly or indirectly connected to a gate of the GaN transistor, the gate ringing and overshoot suppression unit is connected between a second end of the first pull-down transistor and ground, and the gate ringing and overshoot suppression unit is also directly or indirectly connected to the gate of the GaN transistor; the gate ringing and overshoot suppression unit comprises a second pull-down transistor and a pull-down resistor, a first end of the pull-down resistor is connected to the second end of the first pull-down transistor, a second end of the pull-down resistor is connected to ground, a first end of the second pull-down transistor is connected to the second end of the first pull-down transistor, a second end of the second pull-down transistor is connected to ground, and a gate voltage of the GaN transistor is applied to a gate of the second pull-down transistor as an on/off signal which turns the second pull-down transistor on and off, wherein the voltage which is applied to the gate of the second pull-down transistor is always the same as the gate voltage of the GaN transistor; and the gate ringing and overshoot suppression unit is configured such that when the gate voltage of the GaN transistor drops, the gate ringing and overshoot suppression unit controls the release of a gate charge of the GaN transistor with a first impedance if the gate voltage is higher than a specified threshold and controls the release of the gate charge of the GaN transistor with a second impedance if the gate voltage is less than the specified threshold, wherein the first impedance is less than the second impedance. ### Claim 2 (depends on 1) The drive module according to claim 1, wherein the first pull-down transistor and the second pull-down transistor are NMOS transistors, the first end of the first pull-down transistor is a drain of the first pull-down transistor, the second end of the first pull-down transistor is a source of the first pull-down transistor, the first end of the second pull-down transistor is a drain of the second pull-down transistor, and the second end of the second pull-down transistor is a source of the second pull-down transistor. ### Claim 3 (depends on 1) The drive module according to claim 1, wherein the specified threshold matches a zero-volt voltage. ### Claim 4 (depends on 1) The drive module according to claim 1, further comprising a drive unit and a pull-up transistor, wherein: an input side of the drive unit is used to access a control signal of the GaN transistor, a first end of the pull-up transistor is used to access a voltage source, a second end of the pull-up transistor is directly or indirectly connected to the gate of the GaN transistor, and a gate of the pull-up transistor and the gate of the first pull-down transistor are connected to an output side of the drive unit; and the drive unit is configured to control one of the pull-up transistor and the first pull-down transistor to turn on according to the control signal. ### Claim 5 (depends on 4) The drive module according to claim 4, wherein: the drive unit comprises a logical driver, an input side of the logical driver is used to directly or indirectly access the control signal, and an output side of the logical driver is connected to the gate of the pull-up transistor and the gate of the first pull-down transistor; the logical driver is configured to control the pull-up transistor to turn on and the first pull-down transistor to turn off when the control signal is a first control signal; and the logical driver is configured to control the pull-up transistor to turn off and the first pull-down transistor to turn on when the control signal is a second control signal. ### Claim 6 (depends on 5) The drive module according to claim 5, wherein the drive unit further comprises a noise reduction part, an input side of the noise reduction part is used to access the control signal, an output side of the noise reduction part is connected to the input side of the logical driver, and the noise reduction part is used to input the control signal into the logical driver after noise reduction. ### Claim 7 (depends on 6) The drive module according to claim 6, wherein: the control signal comprises a forward input signal and a reverse input signal; the noise reduction part comprises a first Schmitt trigger and a second Schmitt trigger; and an input end of the first Schmitt trigger is used to access the forward input signal, an input end of the second Schmitt trigger is used to access the reverse input signal, and an output end of the first Schmitt trigger and an output end of the second Schmitt trigger are connected to the input side of the logical driver. ### Claim 8 (depends on 4) The drive module according to claim 4, wherein the pull-up transistor is a PMOS transistor, the first end of the pull-up transistor is a source of the pull-up transistor, and the second end of the pull-up transistor is a drain of the pull-up transistor. ### Claim 9 (depends on 1) The drive module according to claim 1, wherein the drive module is arranged on a same chip. ### Claim 10 (depends on 1) A switch circuit comprising the drive module according to claim 1 and the GaN transistor. ### Claim 11 (depends on 10) An electronic device comprising the switch circuit according to claim 10. ### Claim 12 (depends on 2) The drive module according to claim 2, further comprising a drive unit and a pull-up transistor, wherein: an input side of the drive unit is used to access a control signal of the GaN transistor, a first end of the pull-up transistor is used to access a voltage source, a second end of the pull-up transistor is directly or indirectly connected to the gate of the GaN transistor, and a gate of the pull-up transistor and the gate of the first pull-down transistor are connected to an output side of the drive unit; and the drive unit is configured to control one of the pull-up transistor and the first pull-down transistor to turn on according to the control signal. ### Claim 13 (depends on 3) The drive module according to claim 3, further comprising a drive unit and a pull-up transistor, wherein: an input side of the drive unit is used to access a control signal of the GaN transistor, a first end of the pull-up transistor is used to access a voltage source, a second end of the pull-up transistor is directly or indirectly connected to the gate of the GaN transistor, and a gate of the pull-up transistor and the gate of the first pull-down transistor are connected to an output side of the drive unit; and the drive unit is configured to control one of the pull-up transistor and the first pull-down transistor to turn on according to the control signal. ### Claim 14 (depends on 10) The switch circuit according to claim 10, wherein the first pull-down transistor and the second pull-down transistor are NMOS transistors, the first end of the first pull-down transistor is a drain of the first pull-down transistor, the second end of the first pull-down transistor is a source of the first pull-down transistor, the first end of the second pull-down transistor is a drain of the second pull-down transistor, and the second end of the second pull-down transistor is a source of the second pull-down transistor. ### Claim 15 (depends on 10) The switch circuit according to claim 10, wherein the specified threshold matches a zero-volt voltage. ### Claim 16 (depends on 10) The switch circuit according to claim 10, wherein the drive module further comprises a drive unit and a pull-up transistor, wherein: an input side of the drive unit is used to access a control signal of the GaN transistor, a first end of the pull-up transistor is used to access a voltage source, a second end of the pull-up transistor is directly or indirectly connected to the gate of the GaN transistor, and a gate of the pull-up transistor and the gate of the first pull-down transistor are connected to an output side of the drive unit; and the drive unit is configured to control one of the pull-up transistor and the first pull-down transistor to turn on according to the control signal. ### Claim 17 (depends on 16) The switch circuit according to claim 16, wherein: the drive unit comprises a logical driver, an input side of the logical driver is used to directly or indirectly access the control signal, and an output side of the logical driver is connected to the gate of the pull-up transistor and the gate of the first pull-down transistor; the logical driver is configured to control the pull-up transistor to turn on and the first pull-down transistor to turn off when the control signal is a first control signal; and the logical driver is configured to control the pull-up transistor to turn off and the first pull-down transistor to turn on when the control signal is a second control signal. ### Claim 18 (depends on 1) The drive module according to claim 1, wherein the gate voltage of the GaN transistor is directly applied to the gate of the second pull-down transistor. ### Claim 19 A drive module for a GaN transistor comprising: a first pull-down transistor having a first end connected to a gate of the GaN transistor and a second end; and a gate ringing and overshoot suppression unit comprising a second pull-down transistor and a pull-down resistor, a first end of the pull-down resistor is connected to the second end of the first pull-down transistor, a second end of the pull-down resistor is connected to ground, a first end of the second pull-down transistor is connected to the second end of the first pull-down transistor, a second end of the second pull-down transistor is connected to ground, and a gate of the second pull-down transistor is directly connected to the gate of the GaN transistor such that a gate voltage of the GaN transistor is directly applied to the gate of the second pull-down transistor as an on/off signal which turns the second pull-down transistor on and off, wherein the gate ringing and overshoot suppression unit is configured such that when the gate voltage of the GaN transistor drops, the gate ringing and overshoot suppression unit controls the release of a gate charge of the GaN transistor with a first impedance if the gate voltage is higher than a specified threshold and controls the release of the gate charge of the GaN transistor with a second impedance greater than the first impedance if the gate voltage is less than the specified threshold.