# US 12,009,786 B2 · Circuit device, oscillator, and manufacturing method

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- Number: US 12,009,786 B2
- Document ID: US12009786B2
- Status: Granted
- Kind: B2
- Application number: 18/087,056
- Filed: 2022-12-22
- Published: 2023-06-29
- Granted: 2024-06-11
- Earliest claimed: 2021-12-27
- Assignees: Seiko Epson Corporation
- Applicants: Seiko Epson Corporation
- Inventors: Kohei Beppu; Takehiro Yamamoto
- Web page: https://patentgrep.com/patent/US12009786B2

## CPC

- H03B 5/36: active element in amplifier being semiconductor device ({H03B5/323, H03B5/326} , H03B5/38 take precedence)
- H03B 5/04: Modifications of generator to compensate for variations in physical values, e.g. power supply, load, temperature
- H03B 5/32: being a piezoelectric resonator (selection of piezoelectric material H10N30/00)
- H03H 9/0547: {consisting of a vertical arrangement (H03H9/0566 takes precedence)}
- H03H 9/0552: {the device and the other elements being mounted on opposite sides of a common substrate}
- H03H 9/1021: {the BAW device being of the cantilever type}
- H03B 2200/0088: Reduction of noise
- H03B: GENERATION OF OSCILLATIONS, DIRECTLY OR BY FREQUENCY-CHANGING, BY CIRCUITS EMPLOYING ACTIVE ELEMENTS WHICH OPERATE IN A NON-SWITCHING MANNER; GENERATION OF NOISE BY SUCH CIRCUITS (generators adapted for electrophonic musical instruments G10H; masers or lasers H01S; generation of oscillations in plasma H05H)
- H03H: IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS (waveguides, resonators, lines or other devices of the waveguide type H01P)

## Abstract

A circuit device includes a waveform-shaping circuit that waveform-shapes an oscillation signal and provides an output clock signal based on a clock signal. A bias voltage output circuit of the circuit device provides a bias voltage of the oscillation signal that is input to the waveform-shaping circuit. A comparator of the circuit device compares a DC voltage obtained by smoothing the clock signal with a reference voltage. A logic circuit of the circuit device sets an adjustment value of the bias voltage. In a test mode of the logic circuit, the logic circuit changes the adjustment value to determine a set value of the adjustment value based on output of the comparator when the adjustment value is changed and stores the determined set value in a storage circuit.

## Claims

### Claim 1

A circuit device comprising:
an output circuit including a waveform-shaping circuit configured to waveform-shape an oscillation signal, and configured to output an output clock signal based on a clock signal subjected to the waveform-shaping by the waveform-shaping circuit;
a bias voltage output circuit configured to output a bias voltage of the oscillation signal input to the waveform-shaping circuit;
a comparator configured to compare a DC voltage obtained by smoothing the clock signal subjected to the waveform-shaping with a reference voltage;
a logic circuit configured to set an adjustment value of the bias voltage of the bias voltage output circuit; and
a storage circuit, wherein
in a test mode of the circuit device, the logic circuit changes the adjustment value to determine a set value of the adjustment value based on output of the comparator when the adjustment value is changed, and stores the determined set value in the storage circuit.

### Claim 2 (depends on 1)

The circuit device according to claim 1, wherein
in a normal mode of the circuit device, the bias voltage output circuit outputs the bias voltage based on the adjustment value according to the set value stored in the storage circuit.

### Claim 3 (depends on 1)

The circuit device according to claim 1, wherein
the bias voltage output circuit includes:
a ladder resistor circuit provided between a high potential side power source node and a low potential side power source node; and
a selector configured to select one of a plurality of voltage division taps of the ladder resistor circuit based on the adjustment value.

### Claim 4 (depends on 3)

The circuit device according to claim 3, wherein
the bias voltage output circuit includes:
a P-type transistor provided between the high potential side power source node and one end of the ladder resistor circuit and having a gate to which the bias voltage is input; and
an N-type transistor provided between the other end of the ladder resistor circuit and the low potential side power source node and having a gate to which the bias voltage is input.

### Claim 5 (depends on 1)

The circuit device according to claim 1, wherein
the logic circuit is configured to determine the set value by changing the adjustment value by a binary search.

### Claim 6 (depends on 1)

The circuit device according to claim 1, wherein
the storage circuit is a non-volatile memory.

### Claim 7 (depends on 1)

The circuit device according to claim 1, further comprising:
a temperature compensation circuit configured to perform temperature compensation on an oscillation frequency of the oscillation signal, wherein
the bias voltage output circuit is configured to output the bias voltage of the oscillation signal and output a reference voltage for temperature compensation to the temperature compensation circuit.

### Claim 8

An oscillator comprising:
a resonator; and
a circuit device configured to generate an oscillation signal by oscillating the resonator, wherein
the circuit device includes:
an output circuit including a waveform-shaping circuit configured to waveform-shape the oscillation signal, and configured to output an output clock signal based on a clock signal subjected to the waveform-shaping by the waveform-shaping circuit;
a bias voltage output circuit configured to output a bias voltage of the oscillation signal input to the waveform-shaping circuit;
a comparator configured to compare a DC voltage obtained by smoothing the clock signal subjected to the waveform-shaping with a reference voltage;
a logic circuit configured to set an adjustment value of the bias voltage of the bias voltage output circuit; and
a storage circuit, wherein
in a test mode of the circuit device, the logic circuit changes the adjustment value to determine a set value of the adjustment value based on output of the comparator when the adjustment value is changed, and stores the determined set value in the storage circuit.

### Claim 9

A manufacturing method of an oscillator that includes a resonator and a circuit device configured to generate an oscillation signal by oscillating the resonator,
the circuit device including:
an output circuit including a waveform-shaping circuit configured to waveform-shape the oscillation signal, and configured to output an output clock signal based on a clock signal subjected to the waveform-shaping by the waveform-shaping circuit;
a bias voltage output circuit configured to output a bias voltage of the oscillation signal input to the waveform-shaping circuit;
a comparator configured to compare a DC voltage obtained by smoothing the clock signal subjected to the waveform-shaping with a reference voltage; and
a storage circuit,
the manufacturing method comprising:
setting the circuit device to a test mode;
changing the adjustment value in the test mode;
searching for, based on output of the comparator when the adjustment value is changed, the adjustment value for setting a duty ratio of the output clock signal to a predetermined duty ratio;
determining the found adjustment value as a set value of the adjustment value; and
storing the determined set value in the storage circuit.
