# US 12,009,768 B2 · Interface circuit of vehicle-mounted control unit, apparatus, vehicle, and control method > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 12,009,768 B2 - Document ID: US12009768B2 - Status: Granted - Kind: B2 - Application number: 17/863,654 - Filed: 2022-07-13 - Published: 2022-10-27 - Granted: 2024-06-11 - Earliest claimed: 2020-03-27 - Assignees: Huawei Technologies Co., Ltd. - Applicants: Huawei Technologies Co., Ltd. - Inventors: Zixu Wu - Web page: https://patentgrep.com/patent/US12009768B2 ## CPC - G06F 13/385: {for adaptation of a particular data processing system to different peripheral devices} - H02P 7/04: {by means of a H-bridge circuit} - B60R 16/0238: {Electrical distribution centers} - G06F 13/4068: {Electrical coupling} - H02P 6/085: {in a bridge configuration} - H03K 19/01721: {by means of a pull-up or down element} - H04L 12/4625: {Single bridge functionality, e.g. connection of two networks over a single bridge} - H04L 25/4902: {Pulse width modulation; Pulse position modulation} - H04L 12/40: Bus networks - H04L 2012/40215: {Controller Area Network CAN} - H04L 2012/40273: {the transportation system being a vehicle} - G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N) - H02P: CONTROL OR REGULATION OF ELECTRIC MOTORS, ELECTRIC GENERATORS OR DYNAMO-ELECTRIC CONVERTERS; CONTROLLING TRANSFORMERS, REACTORS OR CHOKE COILS - B60R: VEHICLES, VEHICLE FITTINGS, OR VEHICLE PARTS, NOT OTHERWISE PROVIDED FOR - H03K: PULSE TECHNIQUE (measuring pulse characteristics G01R; modulating sinusoidal oscillations with pulses H03C; transmission of digital information H04L; discriminator circuits detecting phase difference between two signals by counting or integrating cycles of oscillation H03D3/04; automatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses where the type of generator is irrelevant or unspecified H03L; coding, decoding or code conversion, in general H03M) - H04L: TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION (arrangements common to telegraphic and telephonic communication H04M) ## Abstract This application provides an interface circuit of a vehicle-mounted control unit comprising an H-bridge circuit, an input branch, and a pull-up network. An input end of the H-bridge circuit is connected to a controller 240, and an output end of the H-bridge circuit is connected to an interface port IO of the interface circuit. A first end of the input branch is connected to the interface port IO, and a second end of the input branch is connected to the controller. ## Claims ### Claim 1 An interface circuit of a vehicle-mounted control unit, wherein the interface circuit comprises: an H-bridge circuit, an input branch, wherein an input end of the H-bridge circuit is connected to a controller, and an output end of the H-bridge circuit is connected to an interface port IO of the interface circuit; a first end of the input branch is connected to the interface port IO, and a second end of the input branch is connected to the controller, and the interface circuit is configured as one or more of the following interfaces under the control of the controller: an H-bridge output interface, a 12 V power output interface, a 5 V digital signal output interface, a 5 V digital signal input interface, a 12 V digital signal input interface, a local interconnect network (LIN) bus interface, or a single edge nibble transmission (SENT) bus interface. ### Claim 2 (depends on 1) The interface circuit according to claim 1, wherein the interface circuit further comprises: a pull-up network, wherein the pull-up network comprises a LIN bus pull-up resistor branch, the LIN bus pull-up resistor branch is provided with a LIN bus pull-up resistor, a diode, and a first switch component, wherein a first end of the LIN bus pull-up resistor is connected to a LIN bus power supply, a second end of the LIN bus pull-up resistor is connected to an anode of the diode, and a cathode of the diode is connected to the interface port IO by using the first switch component; and on-off of the first switch component is controlled by the controller by using a first control branch. ### Claim 3 (depends on 1) The interface circuit according to claim 1, wherein the interface circuit further comprises: a pull-up network, wherein the pull-up network comprises a SENT bus pull-up resistor branch, the SENT bus pull-up resistor branch is provided with a SENT bus pull-up resistor and a second switch component, wherein a first end of the SENT bus pull-up resistor is connected to a SENT bus power supply, and a second end of the SENT bus pull-up resistor is connected to the interface port IO by using the second switch component; and on-off of the second switch component is controlled by the controller by using a second control branch. ### Claim 4 (depends on 2) The interface circuit according to claim 2, wherein the H-bridge circuit is a full-bridge circuit or comprises two half-bridge circuits; the output end of the H-bridge circuit comprises a first output end and a second output end, and the interface port IO comprises a first interface port and a second interface port; and the first interface port is connected to the first output end, and the second interface port is connected to the second output end; wherein the input branch comprises a first input branch and a second input branch, and the first input branch and the second input branch are connected to the first interface port and the second interface port respectively. ### Claim 5 (depends on 3) The interface circuit according to claim 3, wherein the H-bridge circuit is a full-bridge circuit or comprises two half-bridge circuits; the output end of the H-bridge circuit comprises a first output end and a second output end, and the interface port IO comprises a first interface port and a second interface port; and the first interface port is connected to the first output end, and the second interface port is connected to the second output end; wherein the input branch comprises a first input branch and a second input branch, and the first input branch and the second input branch are connected to the first interface port and the second interface port respectively. ### Claim 6 (depends on 4) The interface circuit according to claim 4, wherein the LIN bus pull-up resistor branch comprises a first LIN bus pull-up resistor branch and a second LIN bus pull-up resistor branch that are connected in parallel, the LIN bus pull-up resistor comprises a first pull-up resistor R1 and a second pull-up resistor R2, the diode disposed on the LIN bus pull-up resistor branch comprises a first diode D1 and a second diode D2, and the first switch component disposed on the LIN bus pull-up resistor branch comprises a third switch component S1 and a fourth switch component S2; the first LIN bus pull-up resistor branch comprises the first pull-up resistor R1, the first diode D1, and the third switch component S1, wherein a first end of the first resistor R1 is connected to the LIN bus power supply, a second end of the first pull-up resistor R1 is connected to an anode of the first diode D1, and a cathode of the first diode D1 is connected to the first interface port by using the third switch component S1; the second LIN bus pull-up resistor branch comprises the second pull-up resistor R2, the second diode D2, and the fourth switch component S2, wherein a first end of the second pull-up resistor R2 is connected to the LIN bus power supply, a second end of the second pull-up resistor R2 is connected to an anode of the second diode D2, and a cathode of the second diode D2 is connected to the second interface port by using the fourth switch component S2; and the first control branch comprises a third control branch K1 and a fourth control branch K2, and the controller controls on-off of the third switch component S1 and the fourth switch component S2 by using the third control branch K1 and the fourth control branch K2 respectively. ### Claim 7 (depends on 5) The interface circuit according to claim 5, wherein the SENT bus pull-up resistor branch comprises a first SENT bus pull-up resistor branch and a second SENT bus pull-up resistor branch that are connected in parallel, the SENT bus pull-up resistor comprises a third pull-up resistor R3 and a fourth pull-up resistor R4, and the second switch component disposed on the SENT bus pull-up resistor branch comprises a fifth switch component S3 and a sixth switch component S4; the first SENT bus pull-up resistor branch comprises the third pull-up resistor R3 and the fifth switch component S3, wherein a first end of the third pull-up resistor R3 is connected to the SENT bus power supply, and a second end of the third pull-up resistor R3 is connected to the first interface port by using the fifth switch component S3; the second SENT bus pull-up resistor branch comprises the fourth pull-up resistor R4 and the sixth switch component S4, wherein a first end of the fourth pull-up resistor R4 is connected to the SENT bus power supply, and a second end of the fourth pull-up resistor R4 is connected to the second interface port by using the sixth switch component S4; and the second control branch comprises a fifth control branch K3 and a sixth control branch K4, and the controller controls on-off of the fifth switch component S3 and the sixth switch component S4 by using the fifth control branch K3 and the sixth control branch K4 respectively. ### Claim 8 (depends on 1) The interface circuit according to claim 1, wherein when the interface circuit is configured as the H-bridge output interface, the interface circuit is controlled by the controller to output a control signal of a direct-current brush motor in the H-bridge circuit. ### Claim 9 (depends on 1) The interface circuit according to claim 1, wherein when the interface circuit is configured as the 12 V power output interface, the interface circuit is controlled by the controller to output a high-side output in the H-bridge circuit. ### Claim 10 (depends on 1) The interface circuit according to claim 1, wherein when the interface circuit is configured as the 5 V digital signal output interface, the interface circuit is controlled by the controller to output a low-side output in the H-bridge circuit. ### Claim 11 (depends on 1) The interface circuit according to claim 1, wherein the H-Bridge circuit is an H-bridge circuit with a high-impedance output. ### Claim 12 (depends on 11) The interface circuit according to claim 11, wherein when the interface circuit is configured as the 5 V digital signal input interface, the interface circuit is controlled by the controller to output a high-impedance output in the H-bridge circuit and collect a signal of the interface port IO by using the input branch. ### Claim 13 (depends on 11) The interface circuit according to claim 11, wherein when the interface circuit is configured as the 12 V digital signal input interface, the interface circuit is controlled by the controller to output a high-impedance output in the H-bridge circuit and collect a signal of the interface port IO by using the input branch. ### Claim 14 (depends on 13) The interface circuit according to claim 13, wherein when the interface circuit is configured as the 12 V digital signal input interface, the interface circuit is controlled by the controller to output a high-impedance output in the H-bridge circuit and collect a signal of the interface port IO by using the input branch. ### Claim 15 (depends on 11) The interface circuit according to claim 11, wherein when the interface circuit is configured as the LIN bus interface, the interface circuit is controlled by the controller to turn on a first switch component, and the H-bridge circuit is controlled to output a low-side output based on LIN bus timing or output a high-impedance output based on LIN bus timing. ### Claim 16 (depends on 10) The interface circuit according to claim 10, wherein when the interface circuit is configured as the SENT bus interface, the interface circuit is controlled by the controller to turn on a second switch component, and the H-bridge circuit is controlled to output a high-impedance output based on SENT bus timing. ### Claim 17 (depends on 4) The interface circuit according to claim 4, wherein when the interface circuit is configured as the first output end and the second output end cooperating with each other to work, the interface circuit is controlled by the controller to generate a power supply voltage for a vehicle-mounted electronic device at the first output end of the H-bridge circuit and perform communication at the second output end through at least one of the following interface: a LIN bus interface, a SENT bus interface, a 12 V power output interface, a 5 V digital signal input interface, a 5 V digital signal output interface, or a 12 V digital signal input interface. ### Claim 18 (depends on 5) The interface circuit according to claim 5, wherein when the interface circuit is configured as the first output end and the second output end cooperating with each other to work, the interface circuit is controlled by the controller to generate a power supply voltage for a vehicle-mounted electronic device at the first output end of the H-bridge circuit and perform communication at the second output end through at least one of the following interface: a LIN bus interface, a SENT bus interface, a 12 V power output interface, a 5 V digital signal input interface, a 5 V digital signal output interface, or a 12 V digital signal input interface. ### Claim 19 A control method for an interface circuit, wherein the interface circuit comprises: an H-bridge circuit, an input branch wherein an input end of the H-bridge circuit is connected to a controller, and an output end of the H-bridge circuit is connected to an interface port IO of the interface circuit; a first end of the input branch is connected to the interface port IO, and a second end of the input branch is connected to the controller; and the control method comprises: controlling, by the controller, the interface circuit to be configured as one or more of the following interfaces: an H-bridge output interface, a 12 V power output interface, a 5 V digital signal output interface, a 5 V digital signal input interface, a 12 V digital signal input interface, a local interconnect network (LIN) bus interface, or a single edge nibble transmission (SENT) bus interface. ### Claim 20 (depends on 18) The interface circuit according to claim 18, wherein the interface circuit further comprises: a pull-up network, wherein the pull-up network comprises a LIN bus pull-up resistor branch, the LIN bus pull-up resistor branch is provided with a LIN bus pull-up resistor, a diode, and a first switch component, wherein a first end of the LIN bus pull-up resistor is connected to a LIN bus power supply, a second end of the LIN bus pull-up resistor is connected to an anode of the diode, and a cathode of the diode is connected to the interface port IO by using the first switch component; and on-off of the first switch component is controlled by the controller by using a first control branch.