# US 12,009,436 B2 · Memory cells and integrated assemblies having charge-trapping-material with trap-enhancing-additive > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 12,009,436 B2 - Document ID: US12009436B2 - Status: Granted - Kind: B2 - Application number: 18/094,377 - Filed: 2023-01-08 - Published: 2023-05-25 - Granted: 2024-06-11 - Earliest claimed: 2019-12-23 - Assignees: Micron Technology, Inc. - Applicants: Micron Technology, Inc. - Inventors: Manzar Siddik; Terry H. Kim - Web page: https://patentgrep.com/patent/US12009436B2 ## CPC - H10D 30/69: IGFETs having charge trapping gate insulators, e.g. MNOS transistors - H10D 64/037: {comprising charge-trapping insulators} - G11C 16/0466: {comprising cells with charge storage in an insulating layer, e.g. metal-nitride-oxide-silicon [MNOS], silicon-oxide-nitride-oxide-silicon [SONOS] (G11C16/0483, G11C16/0491 take precedence)} - H10B 43/20: characterised by three-dimensional [3D] arrangements, e.g. with cells on different height levels - H10B 43/27: the channels comprising vertical portions, e.g. U-shaped channels - H10B 43/30: characterised by the memory core region - H10D 30/694: {characterised by the shapes, relative sizes or dispositions of the gate electrodes} - H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES - G11C: STATIC STORES (semiconductor memory devices H10B) - H10B: ELECTRONIC MEMORY DEVICES ## Abstract Some embodiments include a memory cell having charge-trapping-material between a semiconductor channel material and a gating region. The charge-trapping-material includes silicon, nitrogen and trap-enhancing-additive. The trap-enhancing-additive includes one or more of carbon, phosphorus, boron and metal. Some embodiments include an integrated assembly having a stack of alternating first and second levels. The first levels include conductive structures and the second levels are insulative. Channel-material-pillars extend through the stack. Charge-trapping-regions are along the channel-material-pillars and are between the channel-material-pillars and the conductive structures. The charge-trapping-regions include a charge-trapping-material which contains silicon, nitrogen and trap-enhancing-additive. The trap-enhancing-additive includes one or more of carbon, phosphorus, boron and metal. ## Claims ### Claim 1 A memory cell comprising a charge-trapping-region between a semiconductor channel material and a gating region, the charge-trapping-region comprising at least three charge-trapping-materials, at least two of the at least three charge-trapping-materials comprise different charge-trapping-materials; and each of the at least two charge-trapping-materials comprising a trap-enhancing-additive. ### Claim 2 (depends on 1) The memory cell of claim 1 wherein at least one of the trap-enhancing-additives comprises one or more of carbon, phosphorus, boron and metal. ### Claim 3 (depends on 1) The memory cell of claim 1 wherein at least one of the trap-enhancing-additives comprises at least tungsten. ### Claim 4 An integrated assembly, comprising: a stack of alternating first and second levels; the first levels including conductive structures and the second levels being insulative; channel-material-pillars extending through the stack; and charge-trapping-regions comprising: a first charge-trapping-material comprising a trap-enhancing-additive; a second charge-trapping-material; and a third charge-trapping-material comprising the trap-enhancing-additive at a lower concentration than the trap-enhancing-additive of the first charge-trapping-material. ### Claim 5 (depends on 4) The integrated assembly of claim 4 wherein the trap-enhancing-additive comprises one or more of carbon, phosphorus, boron and metal. ### Claim 6 (depends on 4) The integrated assembly of claim 4 wherein the trap-enhancing-additive of the first charge-trapping-material comprises tungsten. ### Claim 7 (depends on 4) The integrated assembly of claim 4 wherein each of the first, second and third charge-trapping-materials comprise the same horizontal cross-section width. ### Claim 8 An integrated assembly, comprising: a stack of alternating first and second levels; the first levels including conductive structures and the second levels being insulative; channel material extending through the stack; tunneling material adjacent the channel material; a charge-trapping-region adjacent the tunneling material and comprising a first charge-trapping-material, a second charge-trapping-material and a third charge-trapping-material comprising a composition different from a composition of the first charge-trapping-material; and at least one of the first, second and third charge-trapping-materials are spaced from, and not contacting, the tunneling material. ### Claim 9 (depends on 8) The integrated assembly of claim 8 further comprising: charge-blocking-material adjacent the charge-trapping-region; and dielectric-barrier-material adjacent the charge-blocking-material, and being between the charge-blocking-material and the conductive structures. ### Claim 10 (depends on 8) The integrated assembly of claim 8 wherein the first charge-trapping-material comprises trap-enhancing-additive and wherein the third charge-trapping-material comprises no trap-enhancing-additive. ### Claim 11 (depends on 10) The integrated assembly of claim 10 wherein the trap-enhancing-additive comprises one or more of carbon, phosphorus, boron and metal. ### Claim 12 (depends on 8) The integrated assembly of claim 8 wherein each of the first, second and third charge-trapping-materials comprises the same horizontal cross-section width. ### Claim 13 (depends on 8) The integrated assembly of claim 8 wherein the first charge-trapping-material comprises trap-enhancing-additive and wherein the third charge-trapping-material comprises a lower concentration of the trap-enhancing-additive. ### Claim 14 (depends on 13) The integrated assembly of claim 13 wherein the trap-enhancing-additive comprises one or more of carbon, phosphorus, boron and metal. ### Claim 15 (depends on 1) The memory cell of claim 1 wherein the two trap-enhancing-additives are different trap-enhancing-additives. ### Claim 16 (depends on 1) The memory cell of claim 1 wherein each of the at least three charge-trapping-materials comprise a thickness, at least one of the three charge-trapping-materials comprising a different thickness relative to the other two charge-trapping-materials. ### Claim 17 (depends on 1) The memory cell of claim 1 wherein each of the at least three charge-trapping-materials comprise a thickness, at least one of the three charge-trapping-materials comprising a thickness ranging from about 10 angstroms to about 100 angstroms. ### Claim 18 (depends on 1) The memory cell of claim 1 wherein at least one of the trap-enhancing-additives comprises nitrogen to a concentration within a range of from about 30 atomic percent to about 60 atomic percent. ### Claim 19 (depends on 1) The memory cell of claim 1 wherein at least one of the trap-enhancing-additives comprises silicon to a concentration within a range of from about 40 atomic percent to about 45 atomic percent. ### Claim 20 (depends on 4) The memory cell of claim 4 wherein at least one of the trap-enhancing-additives comprises nitrogen to a concentration within a range of from about 30 atomic percent to about 60 atomic percent. ### Claim 21 (depends on 4) The memory cell of claim 4 wherein first charge-trapping-material at least one of the trap-enhancing-additives comprises silicon to a concentration within a range of from about 40 atomic percent to about 45 atomic percent. ### Claim 22 (depends on 8) The memory cell of claim 8 wherein at least two of the first, second and third charge-trapping-materials are spaced from, and not contacting, the tunneling material. ### Claim 23 (depends on 8) The memory cell of claim 8 wherein at least one of the first, second and third charge-trapping-materials comprises a trap-enhancing-additive, the trap-enhancing-additive comprises nitrogen to a concentration within a range of from about 30 atomic percent to about 60 atomic percent. ### Claim 24 (depends on 8) The memory cell of claim 8 wherein at least one of the first, second and third charge-trapping-materials comprises a trap-enhancing-additive, the trap-enhancing-additive comprises silicon to a concentration within a range of from about 40 atomic percent to about 45 atomic percent.