# US 12,009,431 B2 · Reinforced thin-film device

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- Number: US 12,009,431 B2
- Document ID: US12009431B2
- Status: Granted
- Kind: B2
- Application number: 17/929,440
- Filed: 2022-09-02
- Published: 2022-12-29
- Granted: 2024-06-11
- Earliest claimed: 2022-09-02
- Assignees: Epinovatech AB
- Applicants: Epinovatech AB
- Inventors: Martin Andreas Olsson
- Web page: https://patentgrep.com/patent/US12009431B2

## CPC

- H10D 30/6211: {having fin-shaped semiconductor bodies integral with the bulk semiconductor substrates}
- B82Y 10/00: Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
- H10D 30/43: having one-dimensional [1D] charge carrier gas channels, e.g. quantum wire FETs or transistors having 1D quantum-confined channels
- H10D 30/6741: {Group IV materials, e.g. germanium or silicon carbide (TFTs having oxide semiconductors H10D30/6755)}
- H10D 30/675: {Group III-V materials, Group II-VI materials, Group IV-VI materials, selenium or tellurium}
- H10D 30/6757: {characterised by the structure of the channel, e.g. transverse or longitudinal shape or doping profile (TFTs having channel structures for preventing kink or snapback effects H10D30/6708; TFTs having lightly-doped source or drain extensions H10D30/6715)}
- H10D 30/6758: {characterised by the insulating substrates}
- H10D 48/3835: {Semiconductor qubit devices comprising a plurality of quantum mechanically interacting semiconductor quantum dots, e.g. Loss-DiVincenzo spin qubits}
- H10D 62/122: {oriented at angles to substrates, e.g. perpendicular to substrates}
- H10D 62/123: {comprising junctions}
- H10D 62/824: comprising only Group III-V materials heterojunctions, e.g. GaN/AlGaN heterojunctions
- H10D 62/83: being Group IV materials, e.g. B-doped Si or undoped Ge
- H10D 62/85: being Group III-V materials, e.g. GaAs
- H10D 62/882: {Graphene}
- H10D 84/02: characterised by using material-based technologies
- H10D 84/85: Complementary IGFETs, e.g. CMOS
- H10D 84/853: {comprising FinFETs}
- H10H 20/812: within the light-emitting regions, e.g. having quantum confinement structures
- H10H 20/821: of the light-emitting regions, e.g. non-planar junctions
- H10H 20/825: containing nitrogen, e.g. GaN
- H10N 60/128: {having three or more electrodes, e.g. transistor-like structures}
- H10N 60/83: Element shape
- H10N 60/85: Superconducting active materials
- H10P 14/24: using chemical vapour deposition [CVD]
- H10P 14/271: {characterised by the preparation of substrate for selective deposition}
- H10P 14/2905: {Silicon, silicon germanium or germanium}
- H10P 14/3406: {Carbon, e.g. diamond-like carbon}
- H10P 14/3411: {Silicon, silicon germanium or germanium}
- H10P 14/3416: {Nitrides}
- H10P 14/3418: {Phosphides}
- H10P 14/3421: {Arsenides}
- H10P 14/3442: {N-type}
- H10P 14/3444: {P-type}
- H10P 14/3462: {Nanowires}
- G01N 27/4146: {involving nanosized elements, e.g. nanotubes, nanowires}
- H10D 30/024: {of fin field-effect transistors [FinFET]}
- H10D 30/6212: {having fin-shaped semiconductor bodies having non-rectangular cross-sections}
- H10D 30/6219: {characterised by the source or drain electrodes}
- H10D 62/822: comprising only Group IV materials heterojunctions, e.g. Si/Ge heterojunctions
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- B82Y: SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
- H10H: INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
- H10N: ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- G01N: INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES (measuring or testing apparatus or processes other than immunoassay, involving enzymes or microorganisms C12M, C12Q)

## Abstract

A reinforced thin-film device is disclosed. The reinforced thin-film device comprising: a substrate having a top surface for supporting an epilayer; a mask layer patterned with a plurality of nanosize cavities disposed on said substrate to form a needle pad; a thin-film of, relative to the substrate, lattice-mismatched semiconductor disposed on said mask layer, wherein said thin-film comprises a plurality of in parallel spaced semiconductor needles of said lattice-mismatched semiconductor embedded in said thin-film, wherein said plurality of semiconductor needles are vertically disposed in the axial direction towards said substrate in said plurality of nanosize cavities of said mask layer; a, relative to the substrate, lattice-mismatched semiconductor epilayer provided on said thin-film and supported thereby; and a FinFET transistor arranged on the lattice-mismatched semiconductor epilayer. The FinFET transistor comprising: a fin semiconductor structure comprising an elongate protruding core portion, the fin semiconductor structure being arranged on the lattice-mismatched semiconductor epilayer, a first and a second nanostructured electrode radially enclosing respectively a source end and a drain end of the protruding core portion, and a nanostructured gate electrode radially enclosing a central portion of the protruding core portion, the central portion being a portion of the protruding core portion between the source end and the drain end.

## Claims

### Claim 1

A reinforced thin-film device comprising:
a substrate having a top surface for supporting an epilayer;
a mask layer patterned with a plurality of nanosize cavities disposed on said substrate to form a needle pad;
a thin-film of, relative to the substrate, lattice-mismatched semiconductor disposed on said mask layer, wherein said thin-film comprises a plurality of in parallel spaced semiconductor needles of said lattice-mismatched semiconductor embedded in said thin-film, wherein said plurality of semiconductor needles are vertically disposed in the axial direction towards said substrate in said plurality of nanosize cavities of said mask layer;
a, relative to the substrate, lattice-mismatched semiconductor epilayer provided on said thin-film and supported thereby; and
a FinFET transistor arranged on the lattice-mismatched semiconductor epilayer, the FinFET transistor comprising:
a fin semiconductor structure comprising an elongate protruding core portion, the fin semiconductor structure being arranged on the lattice-mismatched semiconductor epilayer,
a first and a second nanostructured electrode radially enclosing respectively a source end and a drain end of the protruding core portion, and
a nanostructured gate electrode radially enclosing a central portion of the protruding core portion, the central portion being a portion of the protruding core portion between the source end and the drain end.

### Claim 2 (depends on 1)

The reinforced thin-film device of claim 1, wherein the FinFET transistor further comprises an oxide shell enclosing the protruding core portion, the oxide shell being arranged between the nanostructured gate electrode and the protruding core portion.

### Claim 3 (depends on 2)

The reinforced thin-film device of claim 2, wherein the oxide shell is a high-k dielectric oxide shell.

### Claim 4 (depends on 1)

The reinforced thin-film device of claim 1, wherein the protruding core portion is pnp-doped with the source end and the drain end being p-doped and the central portion of the protruding core portion being n-doped.

### Claim 5 (depends on 1)

The reinforced thin-film device of claim 1, wherein the protruding core portion is npn-doped with the source end and the drain end being n-doped and the central portion of the protruding core portion being p-doped.

### Claim 6 (depends on 1)

The reinforced thin-film device of claim 1, wherein the mask layer is silicon nitride.

### Claim 7 (depends on 1)

The reinforced thin-film device of claim 1, wherein the protruding core portion has a length of 50-200 nm.