# US 12,009,418 B2 · Core-shell nanofin vertical switch and high-voltage switching > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 12,009,418 B2 - Document ID: US12009418B2 - Status: Granted - Kind: B2 - Application number: 17/821,977 - Filed: 2022-08-24 - Published: 2023-03-02 - Granted: 2024-06-11 - Earliest claimed: 2021-08-25 - Assignees: Government of the United States of America, AS Represented By the Secretary of Commerce - Applicants: Government of the United States of America, as represented by the Secretary of Commerce - Inventors: Kristine Ann Bertness; Matthew David Brubaker; Patrick John Fay - Web page: https://patentgrep.com/patent/US12009418B2 ## CPC - H10D 30/477: {Vertical HEMTs or vertical HHMTs} - H10D 30/831: {Vertical FETs having PN junction gate electrodes (Vertical SIT H10D30/202)} - H03K 17/102: {in field-effect transistor switches} - H03K 17/122: {in field-effect transistor switches} - H03K 17/6871: {the output circuit comprising more than one controlled field-effect transistor} - H10D 30/015: {of FETs having heterojunction interface channels or heterojunction gate electrodes, e.g. HEMT} - H10D 62/111: {Multiple RESURF structures, e.g. double RESURF or 3D-RESURF structures} - H10D 62/118: {Nanostructure semiconductor bodies} - H10D 62/824: comprising only Group III-V materials heterojunctions, e.g. GaN/AlGaN heterojunctions - H10D 62/8503: {Nitride Group III-V materials, e.g. AlN or GaN} - B82Y 10/00: Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic - H10D 62/343: {Gate regions of field-effect devices having PN junction gates} - H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES - H03K: PULSE TECHNIQUE (measuring pulse characteristics G01R; modulating sinusoidal oscillations with pulses H03C; transmission of digital information H04L; discriminator circuits detecting phase difference between two signals by counting or integrating cycles of oscillation H03D3/04; automatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses where the type of generator is irrelevant or unspecified H03L; coding, decoding or code conversion, in general H03M) - B82Y: SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES ## Abstract A core-shell nanofin vertical switch performs high-voltage switching and includes: an n-type GaN nanofin core including: an n-type drift layer; an n-type channel; and an n-type source; a p-type nanofin shell surrounding the n-type GaN nanofin core at an interface surface of the n-type GaN nanofin core, and comprising GaN; an optional source contact disposed on the n-type GaN nanofin core and the p-type nanofin shell and in electrical communication with the n-type source, such that the n-type source is interposed between the source contact and the n-type channel; and a gate contact disposed on the p-type nanofin shell and in electrical communication with the p-type nanofin shell, such that the p-type nanofin shell is interposed between the gate contact and the n-type channel, and the gate contact is interposed between the source contact and a drain contact. ## Claims ### Claim 1 A core-shell nanofin vertical switch for high-voltage switching, the core-shell nanofin vertical switch comprising: an n-type GaN nanofin core comprising: an n-type drift layer arranged at a drain terminus of the n-type GaN nanofin core and comprising GaN; an n-type channel disposed on the n-type drift layer and comprising GaN; and an n-type source disposed on the n-type drift layer, arranged at a source terminus, and comprising GaN, such that the n-type channel is interposed between the n-type source and the n-type drift layer; a p-type nanofin shell disposed on the n-type GaN nanofin core, surrounding the n-type GaN nanofin core at an interface surface of the n-type GaN nanofin core, and comprising GaN; an optional source contact disposed on the n-type GaN nanofin core and the p-type nanofin shell and in electrical communication with the n-type source, such that the n-type source is interposed between the source contact and the n-type channel; and a gate contact disposed on the p-type nanofin shell and in electrical communication with the p-type nanofin shell, such that the p-type nanofin shell is interposed between the gate contact and the n-type channel, and the gate contact is interposed between the source contact and a drain contact. ### Claim 2 (depends on 1) The core-shell nanofin vertical switch of claim 1, wherein the source contact is present, and the core-shell nanofin vertical switch is a transistor. ### Claim 3 (depends on 1) The core-shell nanofin vertical switch of claim 1, wherein the source contact is absent, and the core-shell nanofin vertical switch is a diode. ### Claim 4 (depends on 1) The core-shell nanofin vertical switch of claim 1, further comprising a substrate disposed on the n-type drift layer proximate to the drain terminus and distal to the source terminus, such that the n-type drift layer is interposed between the substrate and the n-type channel, and the n-type drift layer and the p-type nanofin shell longitudinally extend away from the substrate toward the source terminus. ### Claim 5 (depends on 4) The core-shell nanofin vertical switch of claim 4, further comprising a buffer layer disposed on the n-type drift layer proximate to the drain terminus and distal to the source terminus, such that the buffer layer is interposed between the substrate and the n-type drift layer. ### Claim 6 (depends on 5) The core-shell nanofin vertical switch of claim 5, wherein the buffer layer provides a crystallographic template for epitaxial growth of the n-type drift layer. ### Claim 7 (depends on 6) The core-shell nanofin vertical switch of claim 6, further comprising a source-gate dielectric fill disposed on the gate contact, such that the source-gate dielectric fill is interposed between the source contact and the gate contact. ### Claim 8 (depends on 7) The core-shell nanofin vertical switch of claim 7, wherein the source-gate dielectric fill electrically isolates the gate contact and the source contact. ### Claim 9 (depends on 5) The core-shell nanofin vertical switch of claim 5, further comprising a growth mask disposed on the buffer layer, such that the growth mask is interposed between the buffer layer and the p-type nanofin shell. ### Claim 10 (depends on 9) The core-shell nanofin vertical switch of claim 9, wherein the growth mask electrically isolates the buffer layer and the p-type nanofin shell. ### Claim 11 (depends on 9) The core-shell nanofin vertical switch of claim 9, further comprising a gate-drain dielectric fill disposed on the p-type nanofin shell and interposed between the growth mask and the gate contact. ### Claim 12 (depends on 11) The core-shell nanofin vertical switch of claim 11, wherein the gate-drain dielectric fill electrically isolates the gate contact and the buffer layer. ### Claim 13 (depends on 4) The core-shell nanofin vertical switch of claim 4, further comprising a drain contact disposed on the substrate, such that the substrate is interposed between the drain contact and the n-type drift layer. ### Claim 14 (depends on 13) The core-shell nanofin vertical switch of claim 13, wherein the drain contact is in electrical communication via ohmic contact with the substrate and the n-type drift layer. ### Claim 15 (depends on 1) The core-shell nanofin vertical switch of claim 1, wherein the n-type drift layer consists essentially of GaN. ### Claim 16 (depends on 1) The core-shell nanofin vertical switch of claim 1, wherein the n-type channel consists essentially of GaN. ### Claim 17 (depends on 1) The core-shell nanofin vertical switch of claim 1, wherein the n-type source consists essentially of GaN. ### Claim 18 (depends on 1) The core-shell nanofin vertical switch of claim 1, wherein the p-type nanofin shell consists essentially of aluminum, gallium, and nitrogen. ### Claim 19 (depends on 1) The core-shell nanofin vertical switch of claim 1, wherein the aluminum, gallium, and nitrogen of the p-type nanofin shell comprises AlxGa1-xN, wherein x is a nonnegative real number from 0 to 1.0. ### Claim 20 A process for high-voltage switching with a core-shell nanofin vertical switch, the process comprising: receiving, by a drain contact of a core-shell nanofin vertical switch, a drain voltage, the core-shell nanofin vertical switch comprising: an n-type GaN nanofin core comprising: an n-type drift layer arranged at a drain terminus of the n-type GaN nanofin core and comprising GaN; an n-type channel disposed on the n-type drift layer and comprising GaN; and an n-type source disposed on the n-type drift layer, arranged at a source terminus, and comprising GaN, such that the n-type channel is interposed between the n-type source and the n-type drift layer; a p-type nanofin shell disposed on the n-type GaN nanofin core, surrounding the n-type GaN nanofin core at an interface surface of the n-type GaN nanofin core, and comprising GaN; an optional source contact disposed on the n-type GaN nanofin core and the p-type nanofin shell and in electrical communication with the n-type source, such that the n-type source is interposed between the source contact and the n-type channel; a gate contact disposed on the p-type nanofin shell and in electrical communication with the p-type nanofin shell, such that the p-type nanofin shell is interposed between the gate contact and the n-type channel, and the gate contact is interposed between the source contact and the drain contact; and the drain contact disposed on the n-type drift layer, such that the drain contact is in electrical communication via ohmic contact with the n-type drift layer; turning on the core-shell nanofin vertical switch by: receiving, by the gate contact, a gate voltage that is positive with respect to a ground potential; accumulating electron charge carriers in the n-type GaN nanofin core in response to receiving the gate voltage; flowing electrical current between the source contact and the drain contact in response to accumulating electron charge carriers; and turning off the core-shell nanofin vertical switch by: receiving, by the gate contact, the gate voltage that is at ground potential or negative with respect to a ground potential; depleting the electron charge carriers from the n-type GaN nanofin core in response to receiving the gate voltage at ground potential or negative with respect to a ground potential; and terminating flow of electrical current between the source contact and the drain contact in response to depleting the electron charge carriers. ### Claim 21 (depends on 20) The process for high-voltage switching of claim 20, further comprising: placing the source contact and the drain contact in electrical communication and receiving the electrical current at the source contact in response to turning on the core-shell nanofin vertical switch; and electrically isolating the source contact and the drain contact in response to turning off the core-shell nanofin vertical switch. ### Claim 22 (depends on 20) The process for high-voltage switching of claim 20, wherein a potential difference between the source contact and the drain contact after the core-shell nanofin vertical switch is subjected to turning is from 1 V to at least 1500 V, and the core-shell nanofin vertical switch is configured so that, without electrical breakdown or damage, the core-shell nanofin vertical switch withstands the potential difference between the source contact and the drain contact from 0 V to at least 1500 V. ### Claim 23 (depends on 20) The process for high-voltage switching of claim 20, further comprising: connecting an electrical load in electrical communication with the source contact, so that the electrical load is: in electrical communication with the drain contact and receives the electrical current from the source contact in response to turning on the core-shell nanofin vertical switch; and electrically isolated from the drain contact in response to turning off the core-shell nanofin vertical switch.