# US 12,009,409 B2 · Semiconductor device and method for fabricating the same

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- Number: US 12,009,409 B2
- Document ID: US12009409B2
- Status: Granted
- Kind: B2
- Application number: 18/118,115
- Filed: 2023-03-06
- Published: 2023-06-29
- Granted: 2024-06-11
- Earliest claimed: 2019-01-22
- Assignees: United Microelectronics Corp.
- Applicants: United Microelectronics Corp.
- Inventors: Chung-Fu Chang; Kuan-Hung Chen; Guang-Yu Lo; Chun-Chia Chen; Chun-Tsen Lu
- Web page: https://patentgrep.com/patent/US12009409B2

## CPC

- H10D 30/024: {of fin field-effect transistors [FinFET]}
- H10D 30/608: {having non-planar bodies, e.g. having recessed gate electrodes}
- H10D 30/62: Fin field-effect transistors [FinFET]
- H10D 64/01344: {in a nitrogen-containing ambient, e.g. N2O oxidation}
- H10D 64/017: {using dummy gates in processes wherein at least parts of the final gates are self-aligned to the dummy gates, i.e. replacement gate processes}
- H10D 64/667: {the conductor comprising a layer of alloy material, compound material or organic material contacting the insulator, e.g. TiN workfunction layers (having lateral variation H10D64/671)}
- H10D 64/681: {having a compositional variation, e.g. multilayered}
- H10D 64/683: {being parallel to the channel plane}
- H10P 14/662: {Laminate layers, e.g. stacks of alternating high-k metal oxides (adhesion layers or buffer layers H10P14/6508, H10P14/6548)}
- H10P 14/69215: {the material being a silicon oxide, e.g. SiO2}
- H10P 14/6927: {the material being a silicon oxynitride, e.g. SiON or SiON:H}
- H10D 30/797: {being in source or drain regions, e.g. SiGe source or drain}
- H10D 62/822: comprising only Group IV materials heterojunctions, e.g. Si/Ge heterojunctions
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10

## Abstract

A method for fabricating semiconductor device includes the steps of: forming a fin-shaped structure on a substrate; forming a gate dielectric layer on the fin-shaped structure; forming a gate electrode on the fin-shaped structure; performing a nitridation process to implant ions into the gate dielectric layer adjacent to two sides of the gate electrode; and forming an epitaxial layer adjacent to two sides of the gate electrode.

## Claims

### Claim 1

A semiconductor device, comprising:
a fin-shaped structure extending along a first direction on a substrate;
a gate electrode extending along a second direction on the fin-shaped structure, wherein the gate electrode comprises:
a high-k dielectric layer;
a work function metal layer; and
a low resistance metal layer;
a spacer extending along the second direction adjacent to the gate electrode; and
an epitaxial layer adjacent to two sides of the gate electrode and the spacer, wherein the epitaxial layer comprises a hexagon under a top view perspective and a protruding portion between the hexagon and the gate electrode and directly under the spacer and the hexagon and the protruding portion are consisted of semiconductor material.

### Claim 2 (depends on 1)

The semiconductor device of claim 1, wherein the protruding portion is between the hexagon and the fin-shaped structure.

### Claim 3 (depends on 1)

The semiconductor device of claim 1, wherein the protruding portion is extended toward the fin-shaped structure along the first direction.

### Claim 4 (depends on 1)

The semiconductor device of claim 1, wherein the first direction is orthogonal to the second direction.