# US 12,009,370 B2 · Display device

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- Number: US 12,009,370 B2
- Document ID: US12009370B2
- Status: Granted
- Kind: B2
- Application number: 17/461,055
- Filed: 2021-08-30
- Published: 2022-06-16
- Granted: 2024-06-11
- Earliest claimed: 2020-12-11
- Assignees: Samsung Display Co., Ltd.
- Applicants: Samsung Display Co., LTD.
- Inventors: Jeong Hwan Kim; Yong Duck Son; Min-Sik Jung; Jun Hwi Park; Da Bin Lee; Won Ho Jang
- Web page: https://patentgrep.com/patent/US12009370B2

## CPC

- H10D 86/60: wherein the TFTs are in active matrices
- H10D 86/441: {Interconnections, e.g. scanning lines}
- H10D 86/481: {integrated with passive devices, e.g. auxiliary capacitors}
- H10H 29/142: {Two-dimensional arrangements, e.g. asymmetric LED layout}
- H10K 59/1213: {the pixel elements being TFTs}
- H10K 59/131: Interconnections, e.g. wiring lines or terminals
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10H: INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
- H10K: ORGANIC ELECTRIC SOLID-STATE DEVICES

## Abstract

A display device includes a metal layer disposed on a substrate; a transistor disposed on the metal layer; and a light emitting element electrically connected to the transistor, wherein the transistor includes a semiconductor layer at least partially overlapping the metal layer, the semiconductor layer includes a first region, a second region, and a channel region disposed between the first region and the second region, and the metal layer overlaps the second region and the channel region and is spaced apart from the first region in a plan view.

## Claims

### Claim 1

A display device comprising:
a metal layer disposed on a substrate;
a transistor disposed on the metal layer; and
a light emitting element electrically connected to the transistor, wherein
the transistor includes a semiconductor layer at least partially overlapping the metal layer,
the semiconductor layer includes a first region, a second region, and a channel region disposed between the first region and the second region,
the metal layer overlaps the second region and the channel region and is spaced apart from the first region in a plan view; and
a driving voltage line that overlaps a portion of the semiconductor layer, wherein
the driving voltage line and the metal layer are spaced apart from each other.

### Claim 2 (depends on 1)

The display device of claim 1, wherein the driving voltage line and the metal layer are disposed on a same layer.

### Claim 3 (depends on 1)

The display device of claim 1, further comprising:
an auxiliary driving voltage line electrically connected to the first region through a first contact hole; and
an upper storage electrode electrically connected to the second region through a second contact hole.

### Claim 4 (depends on 3)

The display device of claim 3, wherein the driving voltage line includes an opening overlapping the first contact hole.

### Claim 5 (depends on 3)

The display device of claim 3, wherein
the transistor includes a gate electrode disposed on the channel region, and
the display device further includes:
a first insulating layer disposed between the gate electrode and the channel region; and
a second insulating layer disposed between the gate electrode and the auxiliary driving voltage line.

### Claim 6 (depends on 5)

The display device of claim 5, wherein the second insulating layer includes the first contact hole and the second contact hole.

### Claim 7 (depends on 1)

The display device of claim 1, wherein
the transistor is a first transistor, and
the display device further includes a second transistor and a third transistor that are electrically connected to the first transistor.

### Claim 8 (depends on 1)

The display device of claim 1, further comprising:
a buffer layer disposed between the metal layer and the semiconductor layer.

### Claim 9

A display device comprising:
a conductive layer disposed on a substrate;
a transistor disposed on the conductive layer; and
a light emitting element electrically connected to the transistor, wherein
the transistor includes:
a semiconductor layer that overlaps a portion of the conductive layer; and
a gate electrode disposed on the semiconductor layer,
the semiconductor layer includes a first region, a second region, and a channel region disposed between the first region and the second region,
the conductive layer includes a driving voltage line and a metal layer that are spaced apart from each other,
the driving voltage line overlaps the first region of the semiconductor layer, and
the metal layer overlaps the second region of the semiconductor layer.

### Claim 10 (depends on 9)

The display device of claim 9, further including:
an auxiliary driving voltage line electrically connected to the first region through a first contact hole; and
an upper storage electrode electrically connected to the second region through a second contact hole.

### Claim 11 (depends on 10)

The display device of claim 10, wherein the driving voltage line includes an opening overlapping the first contact hole.

### Claim 12 (depends on 10)

The display device of claim 10, further comprising:
a buffer layer disposed between the conductive layer and the semiconductor layer.

### Claim 13 (depends on 12)

The display device of claim 12, wherein
the transistor includes a gate electrode disposed on the channel region, and
the display device includes:
a first insulating layer disposed between the gate electrode and the channel region; and
a second insulating layer disposed between the gate electrode and the auxiliary driving voltage line.

### Claim 14 (depends on 13)

The display device of claim 13, wherein the second insulating layer includes the first contact hole and the second contact hole.

### Claim 15 (depends on 13)

The display device of claim 13, further comprising:
a lower storage electrode electrically connected to the gate electrode,
wherein the upper storage electrode and the lower storage electrode overlap each other.

### Claim 16 (depends on 9)

The display device of claim 9, wherein
the transistor is a first transistor, and
the display device further includes a second transistor and a third transistor that are electrically connected to the first transistor.

### Claim 17 (depends on 16)

The display device of claim 16, further comprising:
a data line electrically connected to the second transistor; and
an initialization voltage line electrically connected to the third transistor.

### Claim 18 (depends on 17)

The display device of claim 17, wherein the data line, the initialization voltage line, and the metal layer are disposed on a same layer.