# US 12,009,341 B2 · Integrated antenna package structure > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 12,009,341 B2 - Document ID: US12009341B2 - Status: Granted - Kind: B2 - Application number: 17/564,197 - Filed: 2021-12-28 - Published: 2023-06-22 - Granted: 2024-06-11 - Earliest claimed: 2021-12-17 - Assignees: Industrial Technology Research Institute - Applicants: Industrial Technology Research Institute - Inventors: Po-Kai Chiu; Sheng-Tsai Wu; Yu-Min Lin; Wen-Hung Liu; Ang-Ying Lin; Chang-Sheng Chen - Web page: https://patentgrep.com/patent/US12009341B2 ## CPC - H10P 72/74: {using temporarily an auxiliary support} - H10W 90/00: Package configurations - H10W 40/22: characterised by their shape, e.g. having conical or cylindrical projections - H10W 44/20: at high-frequency [HF] or radio frequency [RF] - H10W 70/685: comprising multiple insulating layers - H10W 72/20: Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps - H10W 74/111: {the semiconductor body being completely enclosed} - H10W 90/701: {characterised by the relative positions of pads or connectors relative to package parts} - H10P 72/7416: {used during dicing or grinding} - H10P 72/7424: {used as a support during the manufacture of self-supporting substrates} - H10P 72/7428: {used to support diced chips prior to mounting} - H10P 72/743: {used as a support during manufacture of interconnect decals or build up layers} - H10W 40/10: Arrangements for heating - H10W 40/228: {the projecting parts being wire-shaped or pin-shaped} - H10W 44/248: {for antennas} - H10W 70/60: Insulating or insulated package substrates; Interposers; Redistribution layers (leadframes H10W70/40) - H10W 70/611: {for connecting multiple chips together} - H10W 70/614: {the multiple chips being integrally enclosed} - H10W 70/635: {Through-vias} - H10W 70/695: Organic materials - H10W 74/019: {using temporary auxiliary substrates (H10W74/017 takes precedence)} - H10W 74/114: {by a substrate and the encapsulations} - H10W 90/288: {characterised by arrangements for thermal management of the stacked chips} - H10W 90/401: {characterised by multiple insulating or insulated package substrates, interposers or RDLs} - H10W 90/724: {between a chip and a stacked insulating package substrate, interposer or RDL} - H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10 - H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10 ## Abstract An integrated antenna package structure includes a first redistribution structure, a first chip, a heat dissipation structure, a second chip, and an antenna structure. The first chip is located on a first side of the first redistribution structure, and is electrically connected to the first redistribution structure. The heat dissipation structure is thermally connected to the first chip, and the first chip is located between the heat dissipation structure and the first redistribution structure. The second chip is located on a second side of the first redistribution structure opposite to the first side, and is electrically connected to the first redistribution structure. The antenna structure is electrically connected to the first redistribution structure. ## Claims ### Claim 1 An integrated antenna package structure, comprising: a first redistribution structure comprising a plurality of first conductive layers and a plurality of first insulating layers overlapping the plurality of first conductive layers; a first chip located on a first side of the first redistribution structure and electrically connected to the first redistribution structure; a heat dissipation structure thermally connected to the first chip, wherein the first chip is located between the heat dissipation structure and the first redistribution structure; a second chip located on a second side of the first redistribution structure opposite to the first side and electrically connected to the first redistribution structure, wherein one of the plurality of first conductive layers is located between the first chip and the second chip; and an antenna structure electrically connected to the first redistribution structure, wherein the antenna structure extends continuously to contact a top surface of the one of the plurality of first conductive layers. ### Claim 2 (depends on 1) The integrated antenna package structure according to claim 1, further comprising: a first package layer surrounding the first chip; and a second package layer surrounding the second chip, wherein the first package layer and the second package layer are respectively located on the first side and the second side of the first redistribution structure. ### Claim 3 (depends on 2) The integrated antenna package structure according to claim 2, wherein the antenna structure is formed on a top surface of the second package layer, and continuously extends from the top surface of the second package layer into a via in the second package layer to form a conductive via that contacts the one of the plurality of first conductive layers. ### Claim 4 (depends on 1) The integrated antenna package structure according to claim 1, wherein the heat dissipation structure includes a second redistribution structure, and the first chip is located between the second redistribution structure and the first redistribution structure. ### Claim 5 (depends on 4) The integrated antenna package structure according to claim 4, further comprising: a first package layer surrounding the first chip; and a conductive pillar, wherein the first package layer surrounds the conductive pillar, and the conductive pillar electrically connects the second redistribution structure to the first redistribution structure. ### Claim 6 (depends on 4) The integrated antenna package structure according to claim 4, wherein the second redistribution structure comprises at least one second conductive layer and at least one second insulating layer overlapping the at least one second conductive layer, wherein a thickness of the at least one second conductive layer is greater than a thickness of the plurality of first conductive layers. ### Claim 7 (depends on 4) The integrated antenna package structure according to claim 4, wherein the heat dissipation structure further comprises: a heat dissipation substrate thermally connected to the second redistribution structure. ### Claim 8 (depends on 1) The integrated antenna package structure according to claim 1, wherein the first chip comprises: a first semiconductor structure; and a plurality of first connecting terminals electrically connecting the first semiconductor structure to the first redistribution structure, and the second chip comprises: a second semiconductor structure; and a plurality of second connecting terminals electrically connecting the second semiconductor structure to the first redistribution structure, wherein the plurality of first connecting terminals the plurality of second connecting terminals are respectively connected to the first side and the second side of the first redistribution structure. ### Claim 9 (depends on 1) The integrated antenna package structure according to claim 1, wherein the antenna structure is directly formed on the first redistribution structure, and a top surface of the antenna structure is closer to the first redistribution structure than a top surface of the second chip. ### Claim 10 An integrated antenna package structure, comprising: a first chip and a second chip; a first redistribution structure located between the first chip and the second chip, wherein the first redistribution structure comprises a plurality of first conductive layers and a plurality of first insulating layers overlapping the plurality of first conductive layers, wherein one of the plurality of first conductive layers is located between the first chip and the second chip; a first package layer surrounding the first chip; a heat dissipation structure located under the first chip and the first package layer and thermally connected to the first chip; and an antenna structure electrically connected to the first redistribution structure, wherein the antenna structure extends continuously to contact the top surface of the one of the plurality of first conductive layers. ### Claim 11 (depends on 10) The integrated antenna package structure according to claim 10, further comprising: a second package layer surrounding the second chip, wherein the first package layer and the second package layer are respectively located on two opposite sides of the first redistribution structure. ### Claim 12 (depends on 11) The integrated antenna package structure according to claim 11, wherein the antenna structure is formed on a top surface of the second package layer, and continuously extends from the top surface of the second package layer into a via in the second package layer to form a conductive via that contacts the one of the plurality of first conductive layers. ### Claim 13 (depends on 10) The integrated antenna package structure according to claim 10, wherein the heat dissipation structure includes a second redistribution structure, and the first chip is located between the second redistribution structure and the first redistribution structure. ### Claim 14 (depends on 13) The integrated antenna package structure according to claim 13, further comprising: a conductive pillar, wherein the first package layer surrounds the conductive pillar, and the conductive pillar electrically connects the second redistribution structure to the first redistribution structure. ### Claim 15 (depends on 13) The integrated antenna package structure according to claim 13, wherein the second redistribution structure comprises at least one second conductive layer and at least one second insulating layer overlapping the at least one second conductive layer, wherein a thickness of the at least one second conductive layer is greater than a thickness of the plurality of first conductive layers. ### Claim 16 (depends on 13) The integrated antenna package structure according to claim 13, wherein the heat dissipation structure further comprises: a heat dissipation substrate thermally connected to the second redistribution structure. ### Claim 17 (depends on 10) The integrated antenna package structure according to claim 10, wherein the first chip comprises: a first semiconductor structure; and a plurality of first connecting terminals electrically connecting the first semiconductor structure to the first redistribution structure, and the second chip comprises: a second semiconductor structure; and a plurality of second connecting terminals electrically connecting the second semiconductor structure to the first redistribution structure, wherein the plurality of first connecting terminals and the plurality of second connecting terminals are respectively connected to a first side and a second side of the first redistribution structure. ### Claim 18 (depends on 10) The integrated antenna package structure according to claim 10, wherein the antenna structure is directly formed on the first redistribution structure, and a top surface of the antenna structure is closer to the first redistribution structure than a top surface of the second chip.