# US 12,009,265 B2 · Slot contacts and method forming same

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- Number: US 12,009,265 B2
- Document ID: US12009265B2
- Status: Granted
- Kind: B2
- Application number: 18/068,110
- Filed: 2022-12-19
- Published: 2023-04-20
- Granted: 2024-06-11
- Earliest claimed: 2018-10-23
- Assignees: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicants: Taiwan Semiconductor Manufacturing Co., Ltd.
- Inventors: Lin-Yu Huang; Li-Zhen Yu; Sheng-Tsung Wang; Jia-Chuan You; Chia-Hao Chang; Tien-Lu Lin; Yu-Ming Lin; Chih-Hao Wang
- Web page: https://patentgrep.com/patent/US12009265B2

## CPC

- H10D 84/038: {using silicon technology, e.g. SiGe}
- H10D 30/024: {of fin field-effect transistors [FinFET]}
- H10D 30/6211: {having fin-shaped semiconductor bodies integral with the bulk semiconductor substrates}
- H10D 62/151: {of IGFETs (of IGFETs having LDD or DDD structure H10D30/601; of thin film transistors H10D30/6713)}
- H10D 64/017: {using dummy gates in processes wherein at least parts of the final gates are self-aligned to the dummy gates, i.e. replacement gate processes}
- H10D 84/0135: {Manufacturing their gate conductors}
- H10D 84/0149: {Manufacturing their interconnections or electrodes, e.g. source or drain electrodes}
- H10D 84/0158: {the components including FinFETs}
- H10D 84/834: {comprising FinFETs}
- H10P 50/695: {characterised by the process involved to create the mask, e.g. lift-off masks or sidewalls or to modify the mask}
- H10P 76/4085: {characterised by the processes involved to create the masks}
- H10W 20/069: {by forming self-aligned vias or self-aligned contact plugs}
- H10W 20/0693: {by forming self-aligned vias}
- H10W 20/072: {of dielectric parts comprising air gaps}
- H10W 20/077: {on sidewalls or on top surfaces of conductors (H10W20/076 takes precedence)}
- H10W 20/46: comprising air gaps
- H10D 30/6219: {characterised by the source or drain electrodes}
- H10W 20/056: {by filling conductive material into holes, grooves or trenches}
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10

## Abstract

A method of forming an integrated circuit structure includes forming a first source/drain contact plug over and electrically coupling to a source/drain region of a transistor, forming a first dielectric hard mask overlapping a gate stack, recessing the first source/drain contact plug to form a first recess, forming a second dielectric hard mask in the first recess, recessing an inter-layer dielectric layer to form a second recess, and forming a third dielectric hard mask in the second recess. The third dielectric hard mask contacts both the first dielectric hard mask and the second dielectric hard mask.

## Claims

### Claim 1

A structure comprising:
a plurality of source/drain regions;
a plurality of gate stacks, each between two of the plurality of source/drain regions;
a gate contact plug over and contacting one of the plurality of gate stacks; and
a first plurality of strips parallel to each other, wherein a discrete strip among the first plurality of strips comprises:
a plurality of source/drain contact plugs over and electrically coupling to the plurality of source/drain regions; and
a conductive feature over and contacting a source/drain contact plug among the plurality of source/drain contact plugs, wherein the conductive feature is formed of a same material as the gate contact plug, and wherein a first sidewall of the source/drain contact plug is vertically aligned to a second sidewall of the conductive feature.

### Claim 2 (depends on 1)

The structure of claim 1, wherein the source/drain contact plug further comprises a third sidewall opposing the first sidewall, and the conductive feature further comprises a fourth sidewall opposing the second sidewall, and wherein the fourth sidewall is offset from the third sidewall.

### Claim 3 (depends on 2)

The structure of claim 2 further comprising a dielectric hard mask overlapping the source/drain contact plug, wherein the dielectric hard mask contacts the conductive feature and the source/drain contact plug.

### Claim 4 (depends on 3)

The structure of claim 3, wherein the dielectric hard mask further comprises an additional sidewall vertically aligned to the third sidewall of the source/drain contact plug.

### Claim 5 (depends on 1)

The structure of claim 1, wherein the discrete strip further comprises a dielectric hard mask contacting sidewalls of the conductive feature and the source/drain contact plug.

### Claim 6 (depends on 5)

The structure of claim 5 further comprising an inter-layer dielectric underlying and contacting the dielectric hard mask.

### Claim 7 (depends on 6)

The structure of claim 6, wherein the dielectric hard mask has a higher breakdown voltage than the inter-layer dielectric.

### Claim 8 (depends on 6)

The structure of claim 6, wherein the dielectric hard mask comprises a high-k dielectric material.

### Claim 9 (depends on 1)

The structure of claim 1, wherein in a top view of the structure, the conductive feature is elongated and has a first lengthwise direction parallel to a second lengthwise direction of the discrete strip.

### Claim 10

A structure comprising:
a first source/drain region and a second source/drain region;
a first source/drain contact plug and a second source/drain plug over and electrically connected to the first source/drain region and the second source/drain region, respectively;
a first metallic feature and a second metallic feature over and contacting the first source/drain contact plug and the second source/drain contact plug, respectively;
a first dielectric hard mask between and contacting the first metallic feature and the second metallic feature; and
a second dielectric hard mask and a third dielectric hard mask overlapping the first source/drain contact plug and the second source/drain contact plug, respectively, wherein the second dielectric hard mask and the third dielectric hard mask are on opposite sides of a combined region that comprises the first metallic feature, the second metallic feature, and first dielectric hard mask.

### Claim 11 (depends on 10)

The structure of claim 10, wherein sidewalls of the first dielectric hard mask are further in contact with additional sidewalls of the first source/drain contact plug and the second source/drain contact plug.

### Claim 12 (depends on 10)

The structure of claim 10, wherein the first source/drain contact plug comprises a first sidewall vertically aligned to a second sidewall of the second dielectric hard mask.

### Claim 13 (depends on 10)

The structure of claim 10, wherein the second dielectric hard mask physically contacts the first metallic feature.

### Claim 14 (depends on 10)

The structure of claim 10, wherein the first metallic feature and the second metallic feature comprise first top surfaces coplanar with a second top surface of the first dielectric hard mask.

### Claim 15 (depends on 14)

The structure of claim 14, wherein the first top surfaces are further coplanar with third top surfaces of the second dielectric hard mask and the third dielectric hard mask.

### Claim 16 (depends on 14)

The structure of claim 14, wherein the first dielectric hard mask comprises an air gap therein.

### Claim 17 (depends on 14)

The structure of claim 14, wherein the first dielectric hard mask is formed of a first dielectric material different from dielectric materials of the second dielectric hard mask and the third dielectric hard mask.

### Claim 18

A structure comprising:
a source/drain region;
a source/drain contact plug overlapping the source/drain region;
a first dielectric hard mask overlapping the source/drain contact plug;
a metallic feature overlapping the source/drain contact plug, wherein a first sidewall of the first dielectric hard mask is in contact with a second sidewall of the metallic feature;
an inter-layer dielectric and a contact etch stop layer; and
a second dielectric hard mask overlapping the inter-layer dielectric and the contact etch stop layer, wherein the second dielectric hard mask contacts both of a third sidewall of the source/drain contact plug and a fourth sidewall of the metallic feature, and wherein the second sidewall and the fourth sidewall are opposing sidewalls of the metallic feature.

### Claim 19 (depends on 18)

The structure of claim 18, wherein the first dielectric hard mask and the second dielectric hard mask comprise different dielectric materials.

### Claim 20 (depends on 18)

The structure of claim 18, wherein an additional first sidewall of the first dielectric hard mask is over and vertically aligned to an additional second sidewall of the source/drain contact plug.