# US 12,009,179 B2 · Bias supply control and data processing

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- Number: US 12,009,179 B2
- Document ID: US12009179B2
- Status: Granted
- Kind: B2
- Application number: 18/141,448
- Filed: 2023-04-30
- Published: 2023-10-26
- Granted: 2024-06-11
- Earliest claimed: 2022-01-26
- Assignees: Advanced Energy Industries, Inc.
- Applicants: Advanced Energy Industries, Inc.
- Inventors: Hien Minh Nguyen
- Web page: https://patentgrep.com/patent/US12009179B2

## CPC

- H01J 37/32082: {Radio frequency generated discharge (H01J37/32357, H01J37/32366, H01J37/32394 and H01J37/32403 take precedence)}
- H01J 37/32174: {Circuits specially adapted for controlling the RF discharge}
- H01J 37/32128: {using particular waveforms, e.g. polarised waves}
- H01J 37/32706: {Polarising the substrate}
- H02M 3/155: using semiconductor devices only
- H03K 3/57: the switching device being a semiconductor device
- H01J: ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS (spark-gaps H01T; electric arc lamps H05B31/00; particle accelerators H05H)
- H02M: APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF (transformers H01F; dynamo-electric converters H02K47/00; controlling transformers, reactors or choke coils, control or regulation of electric motors, generators or dynamo-electric converters H02P)
- H03K: PULSE TECHNIQUE (measuring pulse characteristics G01R; modulating sinusoidal oscillations with pulses H03C; transmission of digital information H04L; discriminator circuits detecting phase difference between two signals by counting or integrating cycles of oscillation H03D3/04; automatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses where the type of generator is irrelevant or unspecified H03L; coding, decoding or code conversion, in general H03M)

## Abstract

Bias supplies and plasma processing systems are disclosed. One bias supply comprises an output node, a return node, and a switch network and at least one power supply coupled to the output node and the return node. The switch network and the at least one power supply configured, in combination, to apply an asymmetric periodic voltage waveform and provide a corresponding current waveform at the output node relative to the return node.

## Claims

### Claim 1

A bias supply comprising:
an output node;
a switch network and at least one power supply coupled to the output node the switch network and the at least one power supply configured, in combination, to apply an asymmetric periodic voltage waveform and provide a corresponding current waveform at the output node, wherein each cycle of the asymmetric periodic voltage waveform includes a first portion that begins with a first negative voltage and changes to a positive peak voltage during the first portion, the asymmetric periodic voltage waveform also changes from the first portion to a third voltage level during a second portion, and the asymmetric periodic voltage waveform comprises a third portion that includes a voltage ramp from between the third voltage level and a fourth voltage level;
a metrology component configured to receive and sample voltage signals indicative of at least a portion of the asymmetric periodic voltage waveform to provide a digital representation of the at least a portion asymmetric periodic voltage waveform; and
a data processing module configured to adjust the digital representation based upon an inductance coupled to the output node.

### Claim 2 (depends on 1)

The bias supply of claim 1, wherein the data processing module is configured to adjust the digital representation based upon inductive elements coupled between the output node and an input to a plasma chamber to construct a representation of the asymmetric periodic voltage waveform at the input to the plasma chamber.

### Claim 3 (depends on 1)

The bias supply of claim 1, wherein the data processing module is configured to calculate a wafer voltage of a wafer coupled to the output node via the inductance and a chuck.

### Claim 4 (depends on 1)

The bias supply of claim 1, wherein the data processing module is configured to obtain an ion energy value using an adjusted digital representation of the asymmetric periodic voltage waveform that is adjusted to compensate for an inductance between the output node and a chuck coupled to the output node.

### Claim 5 (depends on 1)

The bias supply of claim 1, wherein the data processing module is configured to obtain a calculation of Vstep at a chamber input by compensating for inductance between the output node and a chuck coupled to the output node.

### Claim 6 (depends on 1)

The bias supply of claim 1, wherein the first portion transitions to the second portion or the first portion ends and the second portion starts at the positive peak voltage.

### Claim 7

A method for applying a periodic voltage comprising:
applying an asymmetric periodic voltage waveform at an output node, wherein each cycle of the asymmetric periodic voltage waveform includes a first portion that begins with a first negative voltage and changes to a positive peak voltage during the first portion, the asymmetric periodic voltage waveform also changes from the positive peak voltage to a third voltage level during a second portion, and the asymmetric periodic voltage waveform comprises a third portion that includes a voltage ramp from between the third voltage level and a fourth voltage level;
receiving and sampling voltage signals indicative of the periodic voltage waveform to produce a digital representation of the at least a portion asymmetric periodic voltage waveform; and
adjusting the digital representation based upon an inductance coupled to the output node.

### Claim 8 (depends on 7)

The method of claim 7, wherein the first portion transitions to the second portion or the first portion ends and the second portion starts at the positive peak voltage.

### Claim 9 (depends on 7)

The method of claim 7, comprising obtaining an ion energy value using the adjusted digital representation of the asymmetric periodic voltage waveform that is adjusted to compensate for inductance between the output node and a chuck coupled to the output node.

### Claim 10 (depends on 7)

The method of claim 7, comprising calculating Vstep at a chamber input by compensating for the inductance between the output node and a chuck coupled to the output node.

### Claim 11 (depends on 7)

The method of claim 7 comprising: obtaining a wafer voltage value using the adjusted digital representation of the asymmetric periodic voltage waveform that is adjusted to compensate for stray inductance.

### Claim 12

A bias supply to apply a periodic voltage comprising:
an output node;
a switch network and at least one power supply to apply an asymmetric periodic voltage waveform relative to the output node, wherein each cycle of the asymmetric periodic voltage waveform includes a first portion that begins with a first negative voltage and changes to a positive peak voltage during the first portion, the asymmetric periodic voltage waveform also changes from the positive peak voltage to a third voltage level during a second portion, and the asymmetric periodic voltage waveform comprises a third portion that includes a voltage ramp from between the third voltage level and a fourth voltage level;
a metrology component configured to receive and sample voltage signals indicative of the asymmetric periodic voltage waveform to provide a digital representation of the asymmetric periodic voltage waveform; and
a processor and/or a field programmable gate array coupled to nonvolatile memory, the nonvolatile memory comprising non-transitory, processor executable instructions, the instructions comprising instructions to:
receive the digital representation of the asymmetric periodic voltage waveform; and
adjust the digital representation based upon an inductance coupled to the output node.

### Claim 13 (depends on 12)

The bias supply of claim 12, wherein the first portion transitions to the second portion or the first portion ends and the second portion starts at the positive peak voltage.

### Claim 14 (depends on 12)

The bias supply of claim 12, wherein the instructions include instructions to provide first readback value comprising one of ion energy or a voltage step, Vstep, between the positive peak voltage and the third voltage level.

### Claim 15 (depends on 14)

The bias supply of claim 14, wherein the instructions include instructions to provide a second readback value comprising one of a deviation factor indicative of an ion energy distribution or a slope of the voltage ramp.

### Claim 16 (depends on 12)

The bias supply of claim 12, wherein the instructions comprise instructions to obtain an ion energy value using an adjusted digital representation of the asymmetric periodic voltage waveform that is adjusted to compensate for inductance between the output node and a chuck coupled to the output node.

### Claim 17 (depends on 12)

The bias supply of claim 12, wherein the instructions comprise instructions to obtain a calculation of Vstep at a chamber input by compensating for inductance between the output node and a chuck coupled to the output node.

### Claim 18 (depends on 12)

The bias supply of claim 12, wherein the instructions comprise instructions to obtain a wafer voltage value using an adjusted digital representation of the asymmetric periodic voltage waveform that is adjusted to compensate for stray inductance.
