# US 12,009,044 B2 · Memory built-in self-test with automated multiple step reference trimming

> Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt

- Number: US 12,009,044 B2
- Document ID: US12009044B2
- Status: Granted
- Kind: B2
- Application number: 17/757,013
- Filed: 2020-08-28
- Published: 2023-02-16
- Granted: 2024-06-11
- Earliest claimed: 2019-12-09
- Assignees: Siemens Industry Software Inc.
- Applicants: Siemens Industry Software Inc.
- Inventors: Jongsin Yun; Martin Keim
- Web page: https://patentgrep.com/patent/US12009044B2

## CPC

- G11C 29/1201: {comprising I/O circuitry}
- G11C 29/4401: {for self repair}
- G06F 3/0619: {in relation to data integrity, e.g. data losses, bit errors}
- G06F 3/0653: {Monitoring storage devices or systems}
- G06F 3/0673: {Single storage device}
- G11C 29/021: {in voltage or current generators}
- G11C 29/028: {with adaption or trimming of parameters}
- G11C 29/44: Indication or identification of errors, e.g. for repair
- G11C 11/1673: {Reading or sensing circuits or methods}
- G11C 29/46: Test trigger logic
- G11C 2029/1204: {Bit line control}
- G11C 2029/4402: {Internal storage of test result, quality data, chip identification, repair information}
- G11C: STATIC STORES (semiconductor memory devices H10B)
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)

## Abstract

A memory device can sense stored data during memory read operations using a reference trim, and a memory built-in self-test system can perform a multiple step process to set the reference trim for the memory device. The memory built-in self-test system can set a reference trim range that corresponds to a range of available reference trim values and then select one of the reference trim values in the reference trim range as the reference trim for the memory device. The memory built-in self-test system can set the reference trim range by prompting performance of the memory read operations using different positions of the reference trim range relative to read characteristics of the memory device and set a position for the reference trim range relative to the read characteristics of the memory device based on failures of the memory device to correctly sense the stored data during the memory read operations.

## Claims

### Claim 1

A system comprising:
a memory device configured to sense values of stored data using a reference trim during memory read operations; and
a memory built-in self-test system configured to prompt the memory device to perform a plurality of the memory read operations with different locations for a range of available values of the reference trim relative to read characteristics of the memory device and with multiple values for the reference trim with the range, wherein the memory built-in self-test system is configured to set a location for the range of available values of the reference trim relative to the read characteristics of the memory device based, at least in part, on failures of the memory device to correctly sense the stored data during the memory read operations with the different locations for the range of available values of the reference trim, and wherein the memory built-in self-test system is further configured to set the reference trim for the memory device within the range of available values of the reference trim.

### Claim 2 (depends on 1)

The system of claim 1, wherein the memory built-in self-test system is configured to perform the plurality of the memory read operations by iteratively shifting the range of available values of the reference trim relative to the read characteristics of the memory device.

### Claim 3 (depends on 2)

The system of claim 2, wherein the memory built-in self-test system is configured to iteratively shift the range of available values of the reference trim based, at least in part, on relative magnitudes of memory read failures by the memory device using values for the reference trim at boundaries of the range of available values of the reference trim.

### Claim 4 (depends on 1)

The system of claim 1, wherein the memory built-in self-test system is configured to perform the plurality of the memory write and read operations by iteratively shifting the read characteristics of the memory device relative to the range of available values of the reference trim.

### Claim 5 (depends on 4)

The system of claim 4, wherein the memory built-in self-test system is configured to iteratively shift the read characteristics of the memory device based, at least in part, on relative magnitudes of memory read failures by the memory device using values for the reference trim at boundaries of the range of available values of the reference trim.

### Claim 6 (depends on 1)

The system of claim 1, wherein the memory device is a Magnetoresistive Random Access Memory (MRAM) device.

### Claim 7

A method comprising:
prompting, by a memory built-in self-test system-, a memory device to perform a plurality of memory read operations with different positions of a reference trim range relative to read characteristics of the memory device and with multiple values for a reference trim with the reference trim range, wherein the reference trim range corresponds to a range of available values of the reference trim;
determining, by a memory built-in self-test system, when the memory device fails to correctly sense values of stored data using test values for the reference trim in the different positions of the reference trim range; and
setting, by the memory built-in self-test system, a position for the reference trim range relative to the read characteristics of the memory device based, at least in part, on failures of the memory device to correctly sense the stored data during the memory read operations with the different positions for the reference trim range; and
setting, by the memory built-in self-test system, the reference trim for the memory device within the reference trim range having the set position by the memory built-in self-test system.

### Claim 8 (depends on 7)

The method of claim 7, wherein prompting the memory device to perform the plurality of the memory read operations includes iteratively shifting the reference trim range relative to the read characteristics of the memory device.

### Claim 9 (depends on 8)

The method of claim 8, wherein the iteratively shifting the reference trim range relative to the read characteristics of the memory device is based, at least in part, on relative magnitudes of memory read failures by the memory device using values for the reference trim at boundaries of the range of available values of the reference trim.

### Claim 10 (depends on 7)

The method of claim 7, wherein prompting the memory device to perform the plurality of the memory write and read operations includes iteratively shifting the read characteristics of the memory device relative to the reference trim range.

### Claim 11 (depends on 10)

The method of claim 10, wherein the iteratively shifting the read characteristics of the memory device relative to the reference trim range is based, at least in part, on relative magnitudes of memory read failures by the memory device using values for the reference trim at boundaries of the range of available values of the reference trim.

### Claim 12 (depends on 7)

The method of claim 7, wherein the memory device is a Magnetoresistive Random Access Memory (MRAM) device.

### Claim 13

An apparatus comprising:
a memory built-in self-test controller configured to prompt a memory device to perform memory read operations using different positions of a reference trim range relative to read characteristics of the memory device and with multiple values for a reference trim with the reference trim range, wherein the reference trim range corresponds to a range of available values of the reference trim, and wherein the memory device is configured to sense values of stored data using the reference trim during the memory read operations; and
a trim range circuit configured to determine when the memory device fails to correctly sense the values of the stored data using test values for the reference trim, and set a position for the reference trim range relative to the read characteristics of the memory device based, at least in part, on failures of the memory device to correctly sense the stored data during the memory read operations with the different positions for the reference trim range, and wherein the trim feedback circuit is configured to set the reference trim for the memory device within the reference trim range having the set position by the trim range circuit.

### Claim 14 (depends on 13)

The apparatus of claim 13, wherein the memory built-in self-test controller is configured to iteratively shift the reference trim range relative to the read characteristics of the memory device for the memory read operations.

### Claim 15 (depends on 14)

The apparatus of claim 14, wherein the memory built-in self-test controller is configured to iteratively shift the reference trim range based, at least in part, on relative magnitudes of memory read failures by the memory device using values for the reference trim at boundaries of the range of available values of the reference trim.

### Claim 16 (depends on 13)

The apparatus of claim 13, wherein the memory built-in self-test controller is configured to iteratively shift the read characteristics of the memory device relative to the reference trim range.

### Claim 17 (depends on 16)

The apparatus of claim 16, wherein the memory built-in self-test controller is configured to iteratively shift the read characteristics of the memory device based, at least in part, on relative magnitudes of memory read failures by the memory device using values for the reference trim at boundaries of the range of available values of the reference trim.