# US 12,009,038 B2 · Memory device wear leveling > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 12,009,038 B2 - Document ID: US12009038B2 - Status: Granted - Kind: B2 - Application number: 17/659,897 - Filed: 2022-04-20 - Published: 2023-10-26 - Granted: 2024-06-11 - Earliest claimed: 2022-04-20 - Assignees: Micron Technology, Inc. - Applicants: Micron Technology, Inc. - Inventors: Rainer Frank Bonitz - Web page: https://patentgrep.com/patent/US12009038B2 ## CPC - G11C 16/349: {Arrangements for evaluating degradation, retention or wearout, e.g. by counting erase cycles} - G11C 16/3495: {Circuits or methods to detect or delay wearout of nonvolatile EPROM or EEPROM memory devices, e.g. by counting numbers of erase or reprogram cycles, by using multiple memory areas serially or cyclically} - G06F 12/0246: {in block erasable memory, e.g. flash memory} - G11C 16/0483: {comprising cells having several storage transistors connected in series} - G11C 16/16: for erasing blocks, e.g. arrays, words, groups - G11C 16/26: Sensing or reading circuits; Data output circuits - G11C 16/345: {Circuits or methods to detect overerased nonvolatile memory cells, usually during erasure verification} - G11C 29/42: using error correcting codes [ECC] or parity check - G11C 29/76: {using address translation or modifications} - G06F 2212/1036: Life time enhancement - G06F 2212/7204: Capacity control, e.g. partitioning, end-of-life degradation - G06F 2212/7211: Wear leveling - G11C 16/08: Address circuits; Decoders; Word-line control circuits - G11C 2029/0411: {Online error correction} - G11C: STATIC STORES (semiconductor memory devices H10B) - G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N) ## Abstract A controller of a memory device may determine that an endurance parameter associated with a wear leveling pool of a memory of the memory device satisfies a threshold. The wear leveling pool includes a plurality of memory blocks of the memory. The controller may divide, based on determining that the endurance parameter satisfies the threshold, the plurality of memory blocks of the wear leveling pool into a first wear leveling pool subset that includes a first subset of the plurality of memory blocks and a second wear leveling pool subset that includes a second subset of the plurality of memory blocks. A first subset of a plurality of data partitions is stored in the first subset of the plurality of memory blocks, and a second subset of the plurality of data partitions is stored in the second subset of the plurality of memory blocks. ## Claims ### Claim 1 A memory device, comprising: a memory; and a controller, configured to: determine that an average quantity of erase operations for a plurality of memory blocks of a wear leveling pool of the memory satisfies a threshold, wherein the wear leveling pool includes the plurality of memory blocks of the memory; and divide, based on determining that the average quantity of erase operations for the plurality of memory blocks satisfies the threshold, the plurality of memory blocks of the wear leveling pool into a first wear leveling pool subset that includes a first subset of the plurality of memory blocks and a second wear leveling pool subset that includes a second subset of the plurality of memory blocks, wherein a first subset of a plurality of data partitions is stored in the first subset of the plurality of memory blocks of the first wear leveling pool subset, and wherein a second subset of the plurality of data partitions is stored in the second subset of the plurality of memory blocks of the second wear leveling pool subset. ### Claim 2 (depends on 1) The memory device of claim 1, wherein the first subset of the plurality of data partitions is configured to store non-system data associated with a host device; and wherein the second subset of the plurality of data partitions is configured to store system data associated with the host device. ### Claim 3 (depends on 1) The memory device of claim 1, wherein the threshold comprises a threshold quantity of erase operations; and wherein the controller is configured to determine that the average quantity of erase operations is equal to or greater than the threshold quantity of erase operations. ### Claim 4 (depends on 3) The memory device of claim 3, wherein the threshold comprises a configurable threshold quantity of erase operations. ### Claim 5 A memory device, comprising: a memory; and a controller, configured to: determine a threshold based on a junction temperature of the memory device; determine that an endurance parameter associated with a wear leveling pool of the memory satisfies the threshold, wherein the wear leveling pool includes a plurality of memory blocks of the memory; and divide, based on determining that the endurance parameter satisfies the threshold, the plurality of memory blocks of the wear leveling pool into a first wear leveling pool subset that includes a first subset of the plurality of memory blocks and a second wear leveling pool subset that includes a second subset of the plurality of memory blocks, wherein a first subset of a plurality of data partitions is stored in the first subset of the plurality of memory blocks of the first wear leveling pool subset, and wherein a second subset of the plurality of data partitions is stored in the second subset of the plurality of memory blocks of the second wear leveling pool subset. ### Claim 6 (depends on 5) The memory device of claim 5, wherein the controller is configured to identify the threshold in a look-up table based on the junction temperature. ### Claim 7 (depends on 5) The memory device of claim 5, wherein the controller is configured to determine the threshold based on an end-of-life data retention parameter for the memory device. ### Claim 8 (depends on 5) The memory device of claim 5, wherein the controller is configured to determine the threshold based on using the junction temperature in an Arrhenius equation. ### Claim 9 A memory device, comprising: a memory; and a controller, configured to: determine that an endurance parameter associated with a wear leveling pool of the memory satisfies a threshold, wherein the wear leveling pool includes a plurality of memory blocks of the memory; divide, based on determining that the endurance parameter satisfies the threshold, the plurality of memory blocks of the wear leveling pool into a first wear leveling pool subset that includes a first subset of the plurality of memory blocks and a second wear leveling pool subset that includes a second subset of the plurality of memory blocks, wherein a first subset of a plurality of data partitions is stored in the first subset of the plurality of memory blocks of the first wear leveling pool subset, and wherein a second subset of the plurality of data partitions is stored in the second subset of the plurality of memory blocks of the second wear leveling pool subset; and configure the second subset of the plurality of memory blocks of the second wear leveling pool subset as write protected. ### Claim 10 A memory device, comprising: a memory; and a controller, configured to: determine that an endurance parameter associated with a plurality of memory blocks of a first wear leveling pool of the memory satisfies a threshold; reassign, based on determining that the endurance parameter satisfies the threshold, a subset of the plurality of memory blocks of the first wear leveling pool to a second wear leveling pool of the memory device; move one or more partitions from the first wear leveling pool to the second wear leveling pool; and modify one or more storage parameters for the one or more partitions in the second wear leveling pool. ### Claim 11 (depends on 10) The memory device of claim 10, wherein the endurance parameter comprises a quantity of erase cycles for a memory block of the plurality of memory blocks of the first wear leveling pool; wherein the threshold comprises a threshold quantity of erase cycles; and wherein the controller is configured to determine that the quantity of erase cycles for the memory block is equal to or greater than the threshold quantity of erase cycles. ### Claim 12 (depends on 11) The memory device of claim 11, wherein the controller is configured to reassign the subset of the plurality of memory blocks of the first wear leveling pool to the second wear leveling pool based on respective quantities of erase cycles for each of the subset of the plurality of memory blocks satisfying the threshold quantity of erase cycles. ### Claim 13 (depends on 10) The memory device of claim 10, wherein the one or more storage parameters comprise at least one of: a data retention parameter, a maximum quantity of erase cycles, or an access time. ### Claim 14 (depends on 10) The memory device of claim 10, wherein the controller is configured to: increase a maximum quantity of erase cycles for the one or more partitions in the second wear leveling pool; and increase an access time for the one or more partitions in the second wear leveling pool. ### Claim 15 (depends on 10) The memory device of claim 10, wherein the controller is configured to identify the one or more partitions based on one or more data types stored in the one or more partitions. ### Claim 16 A memory device, comprising: a memory; and a controller, configured to: determine that an endurance parameter associated with a plurality of memory blocks of a first wear leveling pool of the memory satisfies a threshold; reassign, based on determining that the endurance parameter satisfies the threshold, a subset of the plurality of memory blocks of the first wear leveling pool to a second wear leveling pool of the memory device; reassign common spare memory blocks of the first wear leveling pool to the second wear leveling pool; and move one or more partitions from the first wear leveling pool to the second wear leveling pool. ### Claim 17 A memory device, comprising: a memory; and a controller, configured to: determine that an endurance parameter associated with a plurality of memory blocks of a first wear leveling pool of the memory satisfies a threshold; reassign, based on determining that the endurance parameter satisfies the threshold, a subset of the plurality of memory blocks of the first wear leveling pool to a second wear leveling pool of the memory device; identify one or more partitions based on the one or more partitions being preconfigured to be moved to the second wear leveling pool when the controller determines that the endurance parameter satisfies the threshold; and move the one or more partitions from the first wear leveling pool to the second wear leveling pool. ### Claim 18 A method, comprising: determining, by a controller of a memory device, that a quantity of available spare blocks for a wear leveling pool of the memory device satisfies a threshold; dividing, by the controller and based on determining that the quantity of available spare blocks for the wear leveling pool satisfies the threshold, a plurality of memory blocks of the wear leveling pool into a first wear leveling pool subset that includes a first subset of the plurality of memory blocks and a second wear leveling pool subset that includes a second subset of the plurality of memory blocks; reassigning, by the controller and based on determining that the quantity of available spare blocks for the wear leveling pool satisfies the threshold, a first subset of common spare memory blocks to the first wear leveling pool subset; and reassigning, by the controller and based on determining that the quantity of available spare blocks for the wear leveling pool satisfies the threshold, a second subset of the common spare memory blocks to the second wear leveling pool subset. ### Claim 19 (depends on 18) The method of claim 18, wherein the threshold comprises a threshold quantity of available spare blocks; and wherein the controller is configured to determine that the quantity of available spare blocks is equal to or less than threshold quantity of spare blocks. ### Claim 20 (depends on 18) The method of claim 18, further comprising: storing, by the controller and in the second subset of the plurality of memory blocks of the second wear leveling pool subset, at least one of: operating system data associated with a host device, digital instrumentation panel data associated with the host device, in-vehicle infotainment system data associated with the host device, a digital navigation and mapping database, or a point of interest database. ### Claim 21 (depends on 20) The method of claim 20, further comprising; storing, by the controller and in the first subset of the plurality of memory blocks of the first wear leveling pool subset, at least one of: application data associated with the host device, recorded data associated with the host device, or user data associated with the host device. ### Claim 22 (depends on 18) The method of claim 18, wherein the second subset of the plurality of memory blocks of the second wear leveling pool subset is configured for storing system data associated with a host device; and wherein a quantity of spare memory blocks in the second subset of the common spare memory blocks is greater relative to a quantity of spare memory blocks in the first subset of the common spare memory blocks. ### Claim 23 (depends on 18) The method of claim 18, further comprising: determining, by the controller, the threshold based on: a junction temperature for the memory device over time, and an end-of-life data retention parameter for the memory device. ### Claim 24 (depends on 18) The method of claim 18, further comprising: configuring the second subset of the plurality of memory blocks of the second wear leveling pool subset as write protected.