# US 12,009,022 B2 · Semiconductor device for memory device

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- Number: US 12,009,022 B2
- Document ID: US12009022B2
- Status: Granted
- Kind: B2
- Application number: 17/885,565
- Filed: 2022-08-11
- Published: 2024-02-15
- Granted: 2024-06-11
- Earliest claimed: 2022-08-11
- Assignees: Nanya Technology Corporation
- Applicants: Nanya Technology Corporation
- Inventors: Shih-Ting Lin
- Web page: https://patentgrep.com/patent/US12009022B2

## CPC

- G11C 11/4074: Power supply or voltage generation circuits, e.g. bias voltage generators, substrate voltage generators, back-up power, power control circuits
- G11C 7/109: {Control signal input circuits}
- G11C 5/147: {Voltage reference generators, voltage or current regulators; Internally lowered supply levels; Compensation for voltage drops (G11C5/141 takes precedence)}
- G11C 7/1084: {Data input buffers, e.g. comprising level conversion circuits, circuits for adapting load}
- G11C 8/06: Address interface arrangements, e.g. address buffers
- G11C: STATIC STORES (semiconductor memory devices H10B)

## Abstract

A semiconductor device can be applied to a memory device. The semiconductor device of the disclosure includes a voltage sensor, a convertor and a command/address on-die-termination (CA_ODT) circuit. The voltage sensor receives a voltage setting command, and sense a voltage level of the voltage setting command to generate a sensing signal. The convertor generates a setting signal in response to the sensing signal. The CA_ODT circuit generates a power voltage for the memory device in response to the setting signal, wherein a voltage level of the power voltage corresponds to the voltage level of the voltage setting command.

## Claims

### Claim 1

A semiconductor device for a memory device, comprising:
a voltage sensor, configured to receive a voltage setting command, and sense a voltage level of the voltage setting command to generate a sensing signal;
a convertor, coupled to the voltage sensor, configured to generate a setting signal in response to the sensing signal; and
a command/address on-die-termination (CA_ODT) circuit, coupled between the convertor and the memory device, configured to generate a power voltage for the memory device in response to the setting signal, wherein a voltage level of the power voltage corresponds to the voltage level of the voltage setting command.

### Claim 2 (depends on 1)

The semiconductor device of claim 1, wherein:
when the voltage level of the voltage setting command is a first voltage level, the CA_ODT circuit generates the power voltage as a high power voltage, and
when the voltage level of the voltage setting command is a second voltage level, the CA_ODT circuit generates the power voltage as a low power voltage.

### Claim 3 (depends on 1)

The semiconductor device of claim 1, wherein the voltage sensor comprises:
a comparator, configured to receive the voltage setting command and a reference voltage, and compare the voltage setting command with the reference voltage to generate the sensing signal.

### Claim 4 (depends on 3)

The semiconductor device of claim 3, wherein:
when the voltage level of the voltage setting command is higher than the voltage level of the reference voltage, the comparator generates the sensing signal having a first sensing value, and
when the voltage level of the voltage setting command is lower than the voltage level of the reference voltage, the comparator generates the sensing signal having a second sensing value.

### Claim 5 (depends on 1)

The semiconductor device of claim 1, wherein the voltage sensor comprises:
a comparator, configured to receive the voltage setting command, a first reference voltage and a second reference voltage, and compare the voltage setting command with the first reference voltage and the second reference voltage to generate the sensing signal.

### Claim 6 (depends on 5)

The semiconductor device of claim 5, wherein:
a voltage level of the first reference voltage is higher than a voltage level of the second reference voltage,
when the voltage level of the voltage setting command is higher than the voltage level of the first reference voltage, the comparator generates the sensing signal having a first sensing value, and
when the voltage level of the voltage setting command is lower than the voltage level of the second reference voltage, the comparator generates the sensing signal having a second sensing value.

### Claim 7 (depends on 1)

The semiconductor device of claim 1, wherein:
the convertor converts the sensing signal having a first sensing value to the setting signal having the first setting value, and
the convertor converts the sensing signal having a second sensing value to the setting signal having the second setting value.

### Claim 8 (depends on 1)

The semiconductor device of claim 1, wherein the CA_ODT circuit is configured to:
provide a first configuration when the setting signal has a first setting value and generate the power voltage having a first voltage level based on the first configuration, and
provide a second configuration when the setting signal has a second setting value and generate the power voltage having a second voltage level based on the second configuration.

### Claim 9 (depends on 1)

The semiconductor device of claim 1, wherein the CA_ODT circuit comprises:
a first switch, wherein a first terminal of the first switch is coupled to a high reference voltage, a second terminal of the first switch is coupled to a power input node coupled to the memory device, and a control terminal of the first switch receives the setting signal; and
a second switch, wherein a first terminal of the second switch is coupled to the power input node, a second terminal of the second switch is coupled to a low reference voltage, and a control terminal of the second switch receives the setting signal.

### Claim 10 (depends on 9)

The semiconductor device of claim 9, wherein:
when the setting signal has a first setting value, the CA_ODT circuit generates the power voltage based on the high reference voltage, and
when the setting signal has a second setting value, the CA_ODT circuit generates the power voltage based on the low reference voltage.

### Claim 11 (depends on 9)

The semiconductor device of claim 9, wherein:
when the setting signal has a first setting value, the CA_ODT circuit turns on the first switch and turns off the second switch, and
when the setting signal has a second setting value, the CA_ODT circuit turns on the second switch and turns off the first switch.