# US 12,008,960 B2 · Pixel driving circuit and method for driving the same, and display substrate > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 12,008,960 B2 - Document ID: US12008960B2 - Status: Granted - Kind: B2 - Application number: 18/014,254 - Filed: 2021-11-22 - Published: 2023-08-31 - Granted: 2024-06-11 - Earliest claimed: 2021-05-31 - Assignees: Boe Technology Group Co., Ltd. - Applicants: Boe Technology Group Co., Ltd. - Inventors: Weixing Liu; Kuanjun Peng; Bin Qin; Xue Dong; Fangzhen Zhang; Wanpeng Teng; Tieshi Wang; Wanzhi Chen; Kai Guo; Chunfang Zhang - Web page: https://patentgrep.com/patent/US12008960B2 ## CPC - G09G 3/3233: with pixel circuitry controlling the current through the light-emitting element - H10H 20/812: within the light-emitting regions, e.g. having quantum confinement structures - H10H 20/831: characterised by their shape - H10H 29/142: {Two-dimensional arrangements, e.g. asymmetric LED layout} - G09G 2300/0426: Layout of electrodes and connections - G09G 2300/0804: Sub-multiplexed active matrix panel, i.e. wherein one active driving circuit is used at pixel level for multiple image producing elements - G09G 2300/0814: used for selection purposes, e.g. logical AND for partial update - G09G 2300/0819: used for counteracting undesired variations, e.g. feedback or autozeroing - G09G 2300/0842: forming a memory circuit, e.g. a dynamic memory with one capacitor - G09G 2300/0861: with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes - G09G 2310/0262: The addressing of the pixel, in a display other than an active matrix LCD, involving the control of two or more scan electrodes or two or more data electrodes, e.g. pixel voltage dependent on signals of two data electrodes - G09G 2310/08: Details of timing specific for flat panels, other than clock recovery - G09G 2320/0233: Improving the luminance or brightness uniformity across the screen - G09G: ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION (arrangements for transferring data between digital computers and displays G06F3/14; static indicating arrangements comprising an association of a number of separate sources or light control cells G09F9/00; static indicating arrangements comprising integral associations of a number of light sources H01J, H01K, H10H, H05B33/12; scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission, details thereof H04N1/00) - H10H: INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS ## Abstract A pixel driving circuit includes a data writing circuit, a light-emitting control circuit and a light-emitting diode chip. The data writing circuit is electrically connected to a first scanning signal terminal, a data signal terminal and a first node. The light-emitting control circuit is electrically connected to the first node, an enable signal terminal, a first voltage signal terminal and a second node, and is configured to transmit a first voltage signal received at the first voltage signal terminal to the second node. The light-emitting diode chip is electrically connected to the second node and a second voltage signal terminal. The light-emitting diode chip includes a plurality of light-emitting portions. The light-emitting diode chip is configured to drive the plurality of light-emitting portions to emit light in different periods of time respectively or drive at least two light-emitting portions to emit light in a same period of time. ## Claims ### Claim 1 A pixel driving circuit, comprising: a data writing circuit electrically connected to a first scanning signal terminal, a data signal terminal and a first node, the data writing circuit being configured to transmit a data signal received at the data signal terminal to the first node in response to a first scanning signal received at the first scanning signal terminal; a light-emitting control circuit electrically connected to the first node, an enable signal terminal, a first voltage signal terminal and a second node, the light-emitting control circuit being configured to transmit a first voltage signal received at the first voltage signal terminal to the second node under control of a voltage of the first node and an enable signal transmitted by the enable signal terminal; a first reset compensation circuit, and a light-emitting diode chip electrically connected to the second node and a second voltage signal terminal, wherein the light-emitting diode chip includes a plurality of light-emitting portions; the plurality of light-emitting portions include at least one first light-emitting portion and at least one second light-emitting portion; a first bonding electrode of a first light-emitting portion in the at least one first light-emitting portion is electrically connected to the second node, and a second bonding electrode of the first light-emitting portion is electrically connected to the second voltage signal terminal; a first bonding electrode of a second light-emitting portion in the at least one second light-emitting portion is electrically connected to the second voltage signal terminal, and a second bonding electrode of the second light-emitting portion is electrically connected to the second node; the light-emitting diode chip is configured to, with cooperation of the first voltage signal from the second node and a second voltage signal received at the second voltage signal terminal, drive the plurality of light-emitting portions to emit light in different periods of time respectively or drive at least two light-emitting portions in the plurality of light-emitting portions to emit light in a same period of time; wherein the light-emitting control circuit includes a first transistor and a second, transistor; a control electrode of the first transistor is electrically connected to the enable signal terminal, a first electrode of the first transistor is electrically connected to the first voltage signal terminal, and a second electrode of the first transistor is electrically connected to a third node; a control electrode of the second transistor is electrically connected to the first node, a first electrode of the second transistor is electrically connected to the third node, and a second electrode of the second transistor is electrically connected to the second node, wherein the first reset compensation circuit is electrically connected to the first scanning signal terminal, a second scanning signal terminal, the first node, the second node, the third node and the second voltage signal terminal; and the first reset compensation circuit is configured to, under control of the first scanning signal and a second scanning signal received at the second scanning signal terminal, reset the pixel driving circuit and compensate for a threshold voltage of the second transistor; the first reset compensation circuit includes a third transistor, a fourth transistor, a fifth transistor, a sixth transistor and a first capacitor; a control electrode of the third transistor is electrically connected to the first scanning signal terminal, a first electrode of the third transistor is electrically connected to the second voltage signal terminal, and a second electrode of the third transistor is electrically connected to a fourth node; a control electrode of the fourth transistor is electrically connected to the second scanning signal terminal, a first electrode of the fourth transistor is electrically connected to the third node, and a second electrode of the fourth transistor is electrically connected to a fifth node; a control electrode of the fifth transistor is electrically connected to the second scanning signal terminal, a first electrode of the fifth transistor is electrically connected to the second node, and a second electrode of the fifth transistor is electrically connected to the fifth node; a control electrode of the sixth transistor is electrically connected to the first scanning signal terminal, a first electrode of the sixth transistor is electrically connected to the fourth node, and a second electrode of the sixth transistor is electrically connected to the first node; and a first terminal of the first capacitor is electrically connected to the fourth node, and a second terminal of the first capacitor is electrically connected to the fifth node. ### Claim 2 (depends on 1) The pixel driving circuit according to claim 1, further comprising a plurality of switching transistors, wherein a first bonding electrode of a light-emitting portion in the plurality of light-emitting portions is electrically connected to the second node through at least one switching transistor in the plurality of switching transistors; and/or a second bonding electrode of the light-emitting portion is electrically connected to the second voltage signal terminal through at least one other switching transistor in the plurality of switching transistors. ### Claim 3 (depends on 2) The pixel driving circuit according to claim 2, wherein a number of the plurality of light-emitting portions is equal to a number of the plurality of switching transistors; and the first bonding electrode of the light-emitting portion is electrically connected to the second node directly, and the second bonding electrode of the light-emitting portion is electrically connected to the second voltage signal terminal through one switching transistor. ### Claim 4 (depends on 2) The pixel driving circuit according to claim 2, wherein a number of the plurality of light-emitting portions is less than a number of the plurality of switching transistors; a first bonding electrode of one light-emitting portion in the plurality of light-emitting portions is electrically connected to the second node directly, and is electrically connected to a first bonding electrode of another light-emitting portion in the plurality of light-emitting portions through at least one switching transistor in the plurality of switching transistors; a second bonding electrode of the one light-emitting portion in the plurality of light-emitting portions is electrically connected to the second voltage signal terminal through at least one other switching transistor in the plurality of switching transistors, and is electrically connected to the first bonding electrode of the another light-emitting portion through at least one yet other switching transistor in the plurality of switching transistors; and a second bonding electrode of the another light-emitting portion is electrically connected to the second voltage signal terminal directly. ### Claim 5 (depends on 2) The pixel driving circuit according to claim 2, wherein the light-emitting control circuit includes a seventh transistor and an eighth transistor; a control electrode of the seventh transistor is electrically connected to the first node, a first electrode of the seventh transistor is electrically connected to the first voltage signal terminal, and a second electrode of the seventh transistor is electrically connected to a sixth node; and a control electrode of the eighth transistor is electrically connected to the enable signal terminal, a first electrode of the eighth transistor is electrically connected to the sixth node, and a second electrode of the eighth transistor is electrically connected to the second node. ### Claim 6 (depends on 5) The pixel driving circuit according to claim 5, further comprising a second reset compensation circuit, wherein the second reset compensation circuit is electrically connected to the first scanning signal terminal, the first node and the sixth node; and the second reset compensation circuit is configured to compensate for a threshold voltage of the seventh transistor in response to the first scanning signal; and the second reset compensation circuit is further electrically connected to an initial signal terminal, and at least one of a third scanning signal terminal and a fourth scanning signal terminal; and the second reset compensation circuit is further configured to, in response to a third scanning signal received at the third scanning signal terminal or a fourth scanning signal received at the fourth scanning signal terminal, transmit an initial signal received at the initial signal terminal to the first node, so as to reset the first node. ### Claim 7 (depends on 6) The pixel driving circuit according to claim 6, wherein the second reset compensation circuit includes an eleventh transistor and a second capacitor; a control electrode of the eleventh transistor is electrically connected to the first scanning signal terminal, a first electrode of the eleventh transistor is electrically connected to a seventh node, and a second electrode of the eleventh transistor is electrically connected to the sixth node; a first terminal of the second capacitor is electrically connected to the first node, and a second terminal of the second capacitor is electrically connected to the seventh node; and the control electrode of the seventh transistor is electrically connected to the first node through the second capacitor, wherein in a case where the second reset compensation circuit is electrically connected to the third scanning signal terminal, the second reset compensation circuit further includes a ninth transistor, wherein a control electrode of the ninth transistor is electrically connected to the third scanning signal terminal, a first electrode of the ninth transistor is electrically connected to the initial signal terminal, and a second electrode of the ninth transistor is electrically connected to the first node; and in a case where the second reset compensation circuit is electrically connected to the fourth scanning signal terminal, the second reset compensation circuit further includes a tenth transistor, wherein a control electrode of the tenth transistor is electrically connected to the fourth scanning signal terminal, a first electrode of the tenth transistor is electrically connected to the initial signal terminal, and a second electrode of the tenth transistor is electrically connected to the first node. ### Claim 8 (depends on 1) The pixel driving circuit according to claim 1, wherein the data writing circuit includes a twelfth transistor; a control electrode of the twelfth transistor is electrically connected to the first scanning signal terminal, a first electrode of the twelfth transistor is electrically connected to the data signal terminal, and a second electrode of the twelfth transistor is electrically connected to the first node. ### Claim 9 (depends on 1) A display substrate, comprising a substrate; and a plurality of pixel driving circuits each according to claim 1, the plurality of pixel driving circuits being disposed on a side of the substrate, wherein in the plurality of light-emitting portions included in the light-emitting diode chip in the pixel driving circuit, each light-emitting portion includes a first semiconductor layer, a quantum well layer and a second semiconductor layer that are stacked in sequence; the first semiconductor layer and the second semiconductor layer have different doping types, the light-emitting portion further includes at least one of a first bonding electrode and a second bonding electrode; the first bonding electrode is electrically connected to the first semiconductor layer of the light-emitting portion; and the second bonding electrode is electrically connected to the second semiconductor layer of the light-emitting portion. ### Claim 10 (depends on 9) The display substrate according to claim 9, wherein the light-emitting diode chip further includes a base; and the plurality of light-emitting portions included in the light-emitting diode chip are located on a same side of the base; and/or first semiconductor layers of at least two light-emitting portions are of a one-piece structure and are electrically connected to a same first bonding electrode. ### Claim 11 (depends on 9) The display substrate according to claim 9, wherein the light-emitting portion includes the first bonding electrode and the second bonding electrode; and first bonding electrodes included in different light-emitting portions are different, and second bonding electrodes included in different light-emitting portions are different. ### Claim 12 (depends on 9) The display substrate according to claim 9, wherein the light-emitting portion includes a plurality of light-emitting sub-portions arranged in series; each light-emitting sub-portion includes a first semiconductor sub-layer, a first quantum well sub-layer and a second semiconductor sub-layer that are stacked in sequence; a first semiconductor sub-layer of a light-emitting sub-portion in a same light-emitting portion is electrically connected to the first bonding electrode of the same light-emitting portion; and a second semiconductor sub-layer of another light-emitting sub-portion in the same light-emitting portion is electrically connected to the second bonding electrode of the same light-emitting portion. ### Claim 13 (depends on 9) The display substrate according to claim 9, wherein the plurality of light-emitting portions include at least one first light-emitting portion and at least one second light-emitting portion; a first bonding electrode of a first light-emitting portion in the at least one first light-emitting portion is electrically connected to the second node, and a second bonding electrode of the first light-emitting portion is electrically connected to the second voltage signal terminal; a first bonding electrode of a second light-emitting portion in the at least one second light-emitting portion is electrically connected to the second voltage signal terminal, and a second bonding electrode of the second light-emitting portion is electrically connected to the second node; a first semiconductor layer of the first light-emitting portion and a second semiconductor layer of the second light-emitting portion are electrically connected to a second bonding electrode; and a second semiconductor layer of the first light-emitting portion and a first semiconductor layer of the second light-emitting portion are electrically connected to another second bonding electrode. ### Claim 14 (depends on 13) The display substrate according to claim 13, wherein the light-emitting diode chip further includes a plurality of connection portions; the first semiconductor layer of the first light-emitting portion is electrically connected to the second semiconductor layer of the second light-emitting portion through a connection portion in the plurality of connection portions; and the first semiconductor layer of the second light-emitting portion is electrically connected to the second semiconductor layer of the first light-emitting portion through another connection portion in the plurality of connection portions. ### Claim 15 (depends on 13) The display substrate according to claim 13, wherein the first light-emitting portion includes a plurality of first light-emitting sub-portions arranged in series, and the second light-emitting portion includes a plurality of second light-emitting sub-portions arranged in series; each first light-emitting sub-portion includes a third semiconductor sub-layer, a second quantum well sub-layer and a fourth semiconductor sub-layer that are stacked in sequence; and each second light-emitting sub-portion includes a fifth semiconductor sub-layer, a third quantum well sub-layer and a sixth semiconductor sub-layer that are stacked in sequence; a third semiconductor sub-layer of a first light-emitting sub-portion in the plurality of first light-emitting sub-portions is electrically connected to the second bonding electrode, and is electrically connected to a sixth semiconductor sub-layer of a second light-emitting sub-portion in the plurality of second light-emitting sub-portions; and a fifth semiconductor sub-layer of another second light-emitting sub-portion in the plurality of second light-emitting sub-portions is electrically connected to the another second bonding electrode, and is electrically connected to a fourth semiconductor sub-layer of another first light-emitting sub-portion in the plurality of first light-emitting sub-portions. ### Claim 16 A method for driving a pixel driving circuit, the pixel driving circuit comprising: a data writing circuit electrically connected to a first scanning signal terminal, a data signal terminal and a first node, the data writing circuit being configured to transmit a data signal received at the data signal terminal to the first node in response to a first scanning signal received at the first scanning signal terminal; a light-emitting control circuit electrically connected to the first node, an enable signal terminal, a first voltage signal terminal and a second node, the light-emitting control circuit being configured to transmit a first voltage signal received at the first voltage signal terminal to the second node under control of a voltage of the first node and an enable signal transmitted by the enable signal terminal; a first reset compensation circuit, and a light-emitting diode chip electrically connected to the second node and a second voltage signal terminal, wherein the light-emitting diode chip includes a plurality of light-emitting portions; the plurality of light-emitting portions include at least one first light-emitting portion and at least one second light-emitting portion; a first bonding electrode of a first light-emitting portion in the at least one first light-emitting portion is electrically connected to the second node, and a second bonding electrode of the first light-emitting portion is electrically connected to the second voltage signal terminal; a first bonding electrode of a second light-emitting portion in the at least one second light-emitting portion is electrically connected to the second voltage signal terminal, and a second bonding electrode of the second light-emitting portion is electrically connected to the second node; the light-emitting diode chip is configured to, with cooperation of the first voltage signal from the second node and a second voltage signal received at the second voltage signal terminal, drive the plurality of light-emitting portions to emit light in different periods of time respectively or drive at least two light-emitting portions in the plurality of light-emitting portions to emit light in a same period of time; wherein the light-emitting control circuit includes a first transistor and a second transistor; a control electrode of the first transistor is electrically connected to the enable signal terminal, a first electrode of the first transistor is electrically connected to the first voltage signal terminal, and a second electrode of the first, transistor is electrically connected to a third node; a control electrode of the second transistor is electrically connected to the first node, a first electrode of the second transistor is electrically connected to the third node, and a second electrode of the second transistor is electrically connected to the second node; wherein the first reset compensation circuit is electrically connected to the first scanning signal terminal, a second scanning signal terminal, the first node, the second node, the third node and the second voltage signal terminal; and the first reset compensation circuit is configured to, under control of the first scanning signal and a second scanning signal received at the second scanning signal terminal, reset the pixel driving circuit and compensate for a threshold voltage of the second transistor; the first reset compensation circuit includes a third transistor, a fourth transistor, a fifth transistor, a sixth transistor and a first capacitor; a control electrode of the third transistor is electrically connected to the first scanning signal terminal, a first electrode of the third transistor is electrically connected to the second voltage signal terminal, and a second electrode of the third transistor is electrically connected to a fourth node; a control electrode of the fourth transistor is electrically connected to the second scanning signal terminal, a first electrode of the fourth transistor is electrically connected to the third node, and a second electrode of the fourth transistor is electrically connected to a fifth node; a control electrode of the fifth transistor is electrically connected to the second scanning signal terminal, a first electrode of the fifth transistor is electrically connected to the second node, and a second electrode of the fifth transistor is electrically connected to the fifth node; a control electrode of the sixth transistor is electrically connected to the first scanning signal terminal, a first electrode of the sixth transistor is electrically connected to the fourth node, and a second electrode of the sixth transistor is electrically connected to the first node; and a first terminal of the first capacitor is electrically connected to the fourth node, and a second terminal of the first capacitor is electrically connected to the fifth node; wherein the method comprises a data writing phase and a light-emitting phase, wherein in the data writing phase, in response to the first scanning signal received at the first scanning signal terminal, the data writing circuit is turned on to transmit the data signal received at the data signal terminal to the first node; in the light-emitting phase, under the control of the voltage of the first node and the enable signal received at the enable signal terminal, the light-emitting control circuit is turned on to transmit the first voltage signal received at the first voltage signal terminal to the second node; and with the cooperation of the first voltage signal from the second node and the second voltage signal received at the second voltage signal terminal, the plurality of light-emitting portions in the light-emitting diode chip emit light in the different periods of time, or the at least two light-emitting portions emit light in the same period of time.