# US 12,008,949 B2 · Driver for display panel

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- Number: US 12,008,949 B2
- Document ID: US12008949B2
- Status: Granted
- Kind: B2
- Application number: 18/091,693
- Filed: 2022-12-30
- Published: 2023-12-14
- Granted: 2024-06-11
- Earliest claimed: 2021-12-30
- Assignees: Sitronix Technology Corp.
- Applicants: Sitronix Technology Corp.
- Inventors: Chung-Hsin Su
- Web page: https://patentgrep.com/patent/US12008949B2

## CPC

- G09G 3/32: semiconductive, e.g. using light-emitting diodes [LED]
- G09G 3/2092: {Details of a display terminals using a flat panel, the details relating to the control arrangement of the display terminal and to the interfaces thereto (suitable for both CRT and flat panel G09G5/003; specific for a CRT G09G1/165)}
- G09G 2300/0408: Integration of the drivers onto the display substrate
- G09G 2300/0426: Layout of electrodes and connections
- G09G 2300/0452: Details of colour pixel setup, e.g. pixel composed of a red, a blue and two green components
- G09G 2310/0267: Details of drivers for scan electrodes, other than drivers for liquid crystal, plasma or OLED displays
- G09G 2310/06: Details of flat display driving waveforms
- G09G 2310/08: Details of timing specific for flat panels, other than clock recovery
- G09G 2320/0204: Compensation of DC component across the pixels in flat panels
- G09G 2320/0233: Improving the luminance or brightness uniformity across the screen
- G09G 2330/06: Handling electromagnetic interferences [EMI], covering emitted as well as received electromagnetic radiation
- G09G: ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION (arrangements for transferring data between digital computers and displays G06F3/14; static indicating arrangements comprising an association of a number of separate sources or light control cells G09F9/00; static indicating arrangements comprising integral associations of a number of light sources H01J, H01K, H10H, H05B33/12; scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission, details thereof H04N1/00)

## Abstract

The present application provides a driver for a display panel, the driver comprises at least one driving circuit, generating a plurality of Type-1 driving signals and a plurality of Type-2 driving signals for driving a plurality of pixels on display panel. The pixels include a plurality of first pixels and a plurality of second pixels adjacent to the first pixels. Each pixel includes a first display element, a second display element, a third display element. The Type-1 driving signals drive the first, second, and third display elements of the first pixels. The Type-2 driving signals drive the first, second, and third display elements of the second pixels. A first pulse of the Type-1 driving signals and a second pulse of the Type-2 driving signals are located at different time segments. By adopting the driver according to the present application, current concentration may be avoided and displaying quality may be improved.

## Claims

### Claim 1

A driver for a display panel, comprising:
at least one driving circuit, generating a plurality of Type-1 driving signals and a plurality of Type-2 driving signals according to an input data, said Type-1 driving signals and said Type-2 driving signals driving a plurality of pixels of said display panel, said pixels including a plurality of first pixels and a plurality of second pixels adjacent to said first pixels, each said pixel including a first display element, a second display element, a third display element, said Type-1 driving signals driving said first, said second, and said third display elements of said first pixels, said Type-2 driving signals driving said first, said second, and said third display elements of said second pixels, said driving circuit determining a width of a first pulse of said Type-1 driving signals and a width of a second pulse of said Type-2 driving signals according to said input data, and said first pulse of said Type-1 driving signals and said second pulse of said Type-2 driving signals located at different time segments.

### Claim 2 (depends on 1)

The driver of claim 1, wherein said Type-1 driving signals and said Type-2 driving signals have a signal period, a starting time located at said signal period of said first pulse of said Type-1 driving signals is different from a starting time located at said signal period of said second pulse of said Type-2 driving signals.

### Claim 3 (depends on 1)

The driver of claim 1, wherein said Type-1 driving signals and said Type-2 driving signals have a signal period, said first pulse of said Type-1 driving signals and said second pulse of said Type-2 driving signals are located at different time segments of said signal period.

### Claim 4 (depends on 1)

The driver of claim 1, wherein said Type-1 driving signals and said Type-2 driving signals have a signal period, said first pulse of said Type-1 driving signals is located at a fore end segment of said signal period and said second pulse of said Type-2 driving signals is located at a rear end segment of said signal period.

### Claim 5 (depends on 1)

The driver of claim 1, wherein said Type-1 driving signals and said Type-2 driving signals have a signal period, said first pulse of said Type-1 driving signals is located at a fore end segment of said signal period; said second pulse of said Type-2 driving signals is located at a middle segment of said signal period; and said middle segment is located after said fore-end segment.

### Claim 6 (depends on 1)

The driver of claim 1, wherein said driving circuit further generates a plurality of Type-3 driving signals and determines a width of a third pulse of said Type-3 driving signals according to said input data; said pixels further comprises a plurality of third pixels; said Type-3 driving signals drives said first, said second, and said third display elements of said third pixels; said Type-1 driving signals, said Type-2 driving signals and said Type-3 driving signals have a signal period, and said third pulse of said Type-3 driving signals, said first pulse of said Type-1 driving signals, and said second pulse of said Type-2 driving signals are located at different time segments of said signal period.

### Claim 7 (depends on 6)

The driver of claim 6, wherein said first pulse of said Type-1 driving signals is located at a fore end segment of said signal period; said second pulse of said Type-2 driving signals is located at a rear end segment of said signal period; and said third pulse of said Type-3 driving signals is located at a middle segment of said signal period.

### Claim 8 (depends on 1)

The driver of claim 1, further comprising:
a storage circuit, coupled to said driving circuit, and storing said input data; and
an enable circuit, coupled to said storage circuit, and enabling said storage circuit receiving said input data for storing said input data.

### Claim 9

A driver for a display panel, comprising:
at least one driving circuit, generating a plurality of Type-1 driving signals and a plurality of Type-2 driving signals according to an input data, determining a width of a first pulse of said Type-1 driving signals and a width of a second pulse of said Type-2 driving signals according to said input data, and said first pulse of said Type-1 driving signals and said second pulse of said Type-2 driving signals located at different time segments.

### Claim 10 (depends on 9)

The driver of claim 9, wherein said driving circuit further generates a plurality of Type-3 driving signals and determines a width of a third pulse of said Type-3 driving signals according to said input data, said Type-1 driving signals, said Type-2 driving signals and said Type-3 driving signals have a signal period, and said third pulse of said Type-3 driving signals, said first pulse of said Type-1 driving signals, and said second pulse of said Type-2 driving signals are located at different time segments of said signal period.
