# US 12,008,947 B2 · Pixel and display device including the same

> Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt

- Number: US 12,008,947 B2
- Document ID: US12008947B2
- Status: Granted
- Kind: B2
- Application number: 18/053,485
- Filed: 2022-11-08
- Published: 2023-05-11
- Granted: 2024-06-11
- Earliest claimed: 2021-11-10
- Assignees: Samsung Display Co., Ltd.
- Applicants: Samsung Display Co., Ltd.
- Inventors: Kyoung Ju Shin; Hee Ju Ma; Sung Rak Hong
- Web page: https://patentgrep.com/patent/US12008947B2

## CPC

- G09G 3/22: using controlled light sources
- G09G 3/3233: with pixel circuitry controlling the current through the light-emitting element
- G06F 3/04166: {Details of scanning methods, e.g. sampling time, grouping of sub areas or time sharing with display driving (Synchronisation with the driving of the display or the backlighting unit to avoid interferences generated internally G06F3/04184)}
- G09G 3/32: semiconductive, e.g. using light-emitting diodes [LED]
- G09G 2300/0426: Layout of electrodes and connections
- G09G 2300/0819: used for counteracting undesired variations, e.g. feedback or autozeroing
- G09G 2300/0852: being a dynamic memory with more than one capacitor
- G09G 2300/0861: with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes
- G09G 2310/0202: Addressing of scan or signal lines
- G09G 2310/0262: The addressing of the pixel, in a display other than an active matrix LCD, involving the control of two or more scan electrodes or two or more data electrodes, e.g. pixel voltage dependent on signals of two data electrodes
- G09G 2310/0267: Details of drivers for scan electrodes, other than drivers for liquid crystal, plasma or OLED displays
- G09G 2310/027: Details of drivers for data electrodes, the drivers handling digital grey scale data, e.g. use of D/A converters
- G09G 2310/08: Details of timing specific for flat panels, other than clock recovery
- G09G 2320/0247: Flicker reduction other than flicker reduction circuits used for single beam cathode-ray tubes
- G09G 2320/043: Preventing or counteracting the effects of ageing
- G09G 2330/021: Power management, e.g. power saving
- G09G 2340/0435: Change or adaptation of the frame rate of the video stream
- H10K 59/1213: {the pixel elements being TFTs}
- H10K 59/40: OLEDs integrated with touch screens
- G09G: ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION (arrangements for transferring data between digital computers and displays G06F3/14; static indicating arrangements comprising an association of a number of separate sources or light control cells G09F9/00; static indicating arrangements comprising integral associations of a number of light sources H01J, H01K, H10H, H05B33/12; scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission, details thereof H04N1/00)
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)
- H10K: ORGANIC ELECTRIC SOLID-STATE DEVICES

## Abstract

A pixel includes a light emitting element, a first transistor connected to the light emitting element, a second transistor connected between a data line and a first electrode of the first transistor, a third transistor connected between a gate electrode of the first transistor T1 and a second electrode of the first transistor, a fourth transistor connected between a gate electrode of the first transistor and an initialization power source, and a storage capacitor connected between the first power source and the gate electrode of the first transistor. A voltage provided through the data line is time divided into a data voltage provided to the gate electrode of the first transistor when both the second and third transistors turn on, and an on-bias voltage provided to the first electrode of the first transistor when the second transistor turns on and the third transistor turns off.

## Claims

### Claim 1

A pixel comprising:
a light emitting element;
a first transistor connected between a first power source and the light emitting element;
a second transistor connected between a data line and a first electrode of the first transistor, the second transistor including a gate electrode connected to a first scan line;
a third transistor connected between a gate electrode of the first transistor and a second electrode of the first transistor, the third transistor including a gate electrode connected to a second scan line;
a fourth transistor connected between the gate electrode of the first transistor and an initialization power source, the fourth transistor including a gate electrode connected to a third scan line; and
a storage capacitor connected between the first power source and the gate electrode of the first transistor,
wherein a voltage provided through the data line is time divided into a data voltage provided to the gate electrode of the first transistor when both the second transistor and the third transistor are turned on, and an on-bias voltage provided to the first electrode of the first transistor when the second transistor is turned on and the third transistor is turned off,
wherein the second transistor is turned on by a first scan signal,
wherein the third transistor is turned on by a second scan signal, and
wherein a falling edge of the second scan signal is between a falling edge of the first scan signal and a rising edge of the first scan signal and overlaps a supply period of the first scan signal between the falling and rising edges of the first scan signal.

### Claim 2 (depends on 1)

The pixel of claim 1,
wherein the voltage provided through the data line is repeatedly changed from the data voltage to the on-bias voltage in a time unit.

### Claim 3 (depends on 2)

The pixel of claim 2,
wherein the time unit is one horizontal cycle.

### Claim 4 (depends on 1)

The pixel of claim 1,
wherein the data voltage has a plurality of voltage levels corresponding to a plurality of grayscale values, and
wherein the on-bias voltage is a constant voltage.

### Claim 5 (depends on 1)

The pixel of claim 1, further comprising:
a fifth transistor connected between the first power source and the first electrode of the first transistor;
a sixth transistor connected between the second electrode of the first transistor and an anode of the light emitting element; and
a seventh transistor connected between an anode initialization power source and the anode of the light emitting element.

### Claim 6 (depends on 5)

The pixel of claim 5,
wherein the fourth transistor is turned on by a third scan signal,
wherein the fifth transistor is turned off by an emission control signal,
wherein the sixth transistor is turned off by the emission control signal, and
wherein the seventh transistor is turned on by a fourth scan signal.

### Claim 7 (depends on 6)

The pixel of claim 6,
wherein the second scan signal and the third scan signal are output at a frequency equal to an image refresh rate.

### Claim 8 (depends on 6)

The pixel of claim 6,
wherein the first scan signal, the fourth scan signal, and the emission control signal are output at a frequency different from an image refresh rate that is equal to or smaller than a reference refresh rate.

### Claim 9 (depends on 8)

The pixel of claim 8,
wherein the reference refresh rate is a maximum refresh rate, and
wherein the frequency is twice of the reference refresh rate.

### Claim 10 (depends on 9)

The pixel of claim 9,
wherein the reference refresh rate is 120 Hz.

### Claim 11 (depends on 6)

The pixel of claim 6,
wherein the third scan signal is supplied before the first scan signal and the second scan signal are supplied.

### Claim 12 (depends on 6)

The pixel of claim 6,
wherein the first scan signal is a signal shifted by one horizontal cycle from the fourth scan signal.

### Claim 13 (depends on 1)

The pixel of claim 1,
wherein each of the third transistor and the fourth transistor is an N-type transistor.

### Claim 14 (depends on 1)

The pixel of claim 1, further comprising:
a boost capacitor between the gate electrode of the second transistor and one end of the storage capacitor.

### Claim 15 (depends on 1)

The pixel of claim 1,
wherein the first transistor further includes a bottom metal electrode directly connected to the first power source.

### Claim 16

A display device comprising:
a display panel including a pixel connected to a data line, the display panel operating at a variable driving frequency; and
a touch sensor disposed on the display panel,
wherein one frame period includes one display scan period and at least one self-scan period,
wherein, during the at least one self-scan period, the display panel is changed to a display scan period when a touch input is sensed through the touch sensor,
wherein a voltage provided through the data line is repeatedly changed in the display scan period including two or more time units and is supplied alternately as a data signal of a data voltage and a bias signal of a first on-bias voltage during the display scan period having a plurality of time units, and
wherein each time unit of the two or more time units has one data voltage signal and the bias signal.

### Claim 17 (depends on 16)

The display device of claim 16,
wherein the data voltage has a plurality of voltage levels corresponding to a plurality of grayscale values, and
wherein the first on-bias voltage is a constant voltage.

### Claim 18 (depends on 16)

The display device of claim 16,
wherein the voltage provided through the data line is a second on-bias voltage different from the first on-bias voltage during the at least one self-scan period.

### Claim 19 (depends on 16)

The display device of claim 16, wherein the pixel includes:
a light emitting element;
a first transistor connected between a first power source and the light emitting element;
a second transistor connected between the data line and a first electrode of the first transistor, the second transistor including a gate electrode connected to a first scan line;
a third transistor connected between a gate electrode of the first transistor and a second electrode of the first transistor, the third transistor including a gate electrode connected to a second scan line;
a fourth transistor connected between the gate electrode of the first transistor and an initialization power source, the fourth transistor including a gate electrode connected to a third scan line; and
a storage capacitor connected between the first power source and the gate electrode of the first transistor.

### Claim 20 (depends on 19)

The display device of claim 19,
wherein, in the display scan period, the data voltage is provided to the gate electrode of the first transistor when both the second transistor and the third transistor are turned on, and the first on-bias voltage is provided to the first electrode of the first transistor when the second transistor is turned on and the third transistor is turned off.