# US 12,008,303 B2 · Cell overlap violation diagnostics with machine learning

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- Number: US 12,008,303 B2
- Document ID: US12008303B2
- Status: Granted
- Kind: B2
- Application number: 17/411,876
- Filed: 2021-08-25
- Published: 2022-03-03
- Granted: 2024-06-11
- Earliest claimed: 2020-08-28
- Assignees: Synopsys, Inc.
- Applicants: Synopsys, Inc.
- Inventors: Leslie K. Hwang; Srinivasa R. Arikati
- Web page: https://patentgrep.com/patent/US12008303B2

## CPC

- G06F 30/398: Design verification or optimisation, e.g. using design rule check [DRC], layout versus schematics [LVS] or finite element methods [FEM] (optical proximity correction [OPC] design processes G03F1/36)
- G06F 30/392: Floor-planning or layout, e.g. partitioning or placement
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)

## Abstract

A method for identifying design rule checking (DRC) violation types within an integrated circuit (IC) chip design includes receiving an IC chip design layout, and performing a DRC process on the IC chip design layout to identify DRC violations. Further, the method includes generating clustered heatmaps from heatmaps generated from the DRC violations. The method further includes identifying a first DRC violation type and a corresponding first cell pair within the IC chip design layout by analyzing the clustered heatmaps with a diagnostic model.

## Claims

### Claim 1

A method for identifying design rule checking (DRC) violation types within an integrated circuit (IC) chip design, the method comprising:
receiving an IC chip design layout;
performing a DRC process on the IC chip design layout to identify DRC violations;
generating heatmaps for the DRC violations, wherein each of the DRC violations corresponds to a different one of the heatmaps;
generating, by one or more processors, clustered heatmaps from the heatmaps generated for the DRC violations by combining two or more of the heatmaps that are associated with a first error within the IC chip design layout; and
identifying, by the one or more processors, a first DRC violation type and a corresponding first cell pair within the IC chip design layout by analyzing the clustered heatmaps with a diagnostic model.

### Claim 2 (depends on 1)

The method of claim 1, wherein the heatmaps indicate an error density distribution of a corresponding DRC violation of the DRC violations.

### Claim 3 (depends on 1)

The method of claim 1, wherein the first DRC violation type is a cell overlap violation.

### Claim 4 (depends on 3)

The method of claim 3, wherein identifying the first DRC violation type comprises:
determining overlap between a first cell and a second cell of the IC chip design layout.

### Claim 5 (depends on 1)

The method of claim 1, wherein generating the clustered heatmaps comprises:
identifying a first heatmap of the heatmaps and a second heatmap of the heatmaps that have a similar polygon; and
clustering the first heatmap and the second heatmap to generate the clustered heatmaps.

### Claim 6 (depends on 1)

The method of claim 1, wherein analyzing the clustered heatmaps with the diagnostic model comprises identifying one or more heatmaps having a similar polygon.

### Claim 7 (depends on 1)

The method of claim 1, wherein the diagnostic model is trained to identify a type of DRC violations associated with the first DRC violation.

### Claim 8

A system comprising:
a memory storing instructions; and
a processor, coupled with the memory and to execute the instructions, the instructions when executed cause the processor to:
receive an integrated circuit (IC) design layout;
perform a DRC process on the IC design layout to identify DRC violations;
generate heatmaps for the DRC violations, wherein each of the DRC violations corresponds to a different one of the heatmaps;
generate clustered heatmaps from the heatmaps generated for the DRC violations by combining two or more of the heatmaps that are associated with a first error within the IC design layout; and
identify a first DRC violation type and a corresponding first cell pair within the IC design layout by analyzing the clustered heatmaps with a diagnostic model.

### Claim 9 (depends on 8)

The system of claim 8, wherein the heatmaps indicate an error density distribution of a DRC violation of the DRC violations.

### Claim 10 (depends on 8)

The system of claim 8, wherein the first DRC violation type is a cell overlap violation.

### Claim 11 (depends on 10)

The system of claim 10, wherein identifying the first DRC violation type comprises:
determining overlap between a first cell and a second cell of the IC design layout.

### Claim 12 (depends on 8)

The system of claim 8, wherein generating the clustered heatmaps comprises:
identifying a first heatmap of the heatmaps and a second heatmap of the heatmaps that have a similar polygon; and
clustering the first heatmap and the second heatmap to generate the clustered heatmaps.

### Claim 13 (depends on 8)

The system of claim 8, wherein analyzing the clustered heatmaps with the diagnostic model comprises identifying one or more heatmaps having a similar polygon.

### Claim 14 (depends on 8)

The system of claim 8, wherein the diagnostic model is trained to identify a type of DRC violations associated with the first DRC violation.

### Claim 15

A non-transitory computer readable medium comprising stored instructions, which when executed by a processor, cause the processor to:
receive an integrated circuit (IC) design layout;
perform a design rule checking (DRC) process on the IC design layout to identify DRC violations;
determine an error distribution across the IC design layout based on the DRC violations by combining error distributions associated with a first error within the IC design layout, the error distributions are generated for the DRC violations; and
identify a first DRC violation type and a corresponding first cell pair within the IC design layout based on the error distribution across the IC design layout.

### Claim 16 (depends on 15)

The non-transitory computer readable medium of claim 15, wherein the error distribution indicates an error density distribution of a DRC violation of the DRC violations.

### Claim 17 (depends on 15)

The non-transitory computer readable medium of claim 15, wherein the first DRC violation type is a cell overlap violation.

### Claim 18 (depends on 17)

The non-transitory computer readable medium of claim 17, wherein identifying the first DRC violation type comprises:
determining overlap between a first cell and a second cell of the IC design layout.

### Claim 19 (depends on 15)

The non-transitory computer readable medium of claim 15 the error distributions are represented as heatmaps, and the processor is further caused to generate clustered heatmaps by:
identifying a first heatmap of the heatmaps and a second heatmap of the heatmaps that have a similar polygon; and
clustering the first heatmap and the second heatmap to generate the clustered heatmaps, wherein the clustered heatmaps are analyzed with a diagnostic model to identify the first DRC violation type.

### Claim 20 (depends on 19)

The non-transitory computer readable medium of claim 19, wherein analyzing the clustered heatmaps with the diagnostic model comprises identifying one or more heatmaps having a similar polygon.