# US 12,008,262 B2 · Read voltage control method, memory storage device and memory control circuit unit

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- Number: US 12,008,262 B2
- Document ID: US12008262B2
- Status: Granted
- Kind: B2
- Application number: 17/080,854
- Filed: 2020-10-27
- Published: 2022-04-07
- Granted: 2024-06-11
- Earliest claimed: 2020-10-07
- Assignees: Phison Electronics Corp.
- Applicants: Phison Electronics Corp.
- Inventors: Shih-Jia Zeng; Chun-Wei Tsao; Chih-Wei Wang; Wei Lin
- Web page: https://patentgrep.com/patent/US12008262B2

## CPC

- G06F 3/0616: {in relation to life time, e.g. increasing Mean Time Between Failures [MTBF]}
- G06F 3/0659: {Command handling arrangements, e.g. command buffers, queues, command scheduling}
- G06F 3/0604: {Improving or facilitating administration, e.g. storage management}
- G06F 3/0625: {Power saving in storage systems}
- G06F 3/0634: {by changing the state or mode of one or more devices}
- G06F 3/0679: {Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]}
- G11C 11/5671: {using charge trapping in an insulator}
- G11C 16/26: Sensing or reading circuits; Data output circuits
- G11C 29/021: {in voltage or current generators}
- G11C 29/028: {with adaption or trimming of parameters}
- Y02D 10/00: Energy efficient computing, e.g. low power processors, power management or thermal management
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)
- G11C: STATIC STORES (semiconductor memory devices H10B)
- Y02D: CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE

## Abstract

An exemplary embodiment of the invention provides a read voltage control method for a rewritable non-volatile memory module. The method includes: sending a first read command sequence which instructs a reading of a plurality of first memory cells by using a first voltage level to obtain first data; obtaining first adjustment information of a read voltage according to the first data and a channel parameter of the first memory cells, and the channel parameter reflects a channel status of the first memory cells; and adjusting a voltage level of the read voltage from the first voltage level to a second voltage level according to the first adjustment information.

## Claims

### Claim 1

A read voltage control method for a rewritable non-volatile memory module, wherein the rewritable non-volatile memory module comprises a plurality of memory cells, and the read voltage control method comprises:
sending a first read command sequence which instructs a reading of a plurality of first memory cells in the memory cells by using a first voltage level to obtain first data, wherein the first data is a total number of memory cells turned on by the first voltage level in the first memory cells;
determining a channel parameter according to curve information of a threshold voltage distribution of the first memory cells, wherein the curve information describes at least one of a curve endpoint, a curve type, a curve peak value and a curve slope of the threshold voltage distribution, and the threshold voltage distribution presents a number of memory cells each having a specific threshold voltage among the first memory cells;
obtaining first adjustment information of a read voltage according to the first data and the channel parameter of the first memory cells, wherein the channel parameter reflects a channel status of the first memory cells; and
adjusting a voltage level of the read voltage from the first voltage level to a second voltage level according to the first adjustment information.

### Claim 2 (depends on 1)

The read voltage control method of claim 1, further comprising:
if the channel status of the first memory cells matches a first status, determining the channel status as a first parameter; and
if the channel status of the first memory cells matches a second status, determining the channel status as a second parameter,
wherein the first parameter is different from the second parameter.

### Claim 3 (depends on 1)

The read voltage control method of claim 1, wherein the channel status of the first memory cells comprises a threshold voltage distribution status of the first memory cells.

### Claim 4 (depends on 1)

The read voltage control method of claim 1, further comprising:
adjusting the first adjustment information of the read voltage according to a proportional parameter;
sending a second read command sequence which instructs a reading of the first memory cells by using the second voltage level to obtain second data; and
adjusting the proportional parameter according to the first data and the second data.

### Claim 5 (depends on 1)

The read voltage control method of claim 1, further comprising:
adjusting the first adjustment information of the read voltage according to a proportional parameter;
after adjusting the voltage level of the read voltage to the second voltage level, adjusting the voltage level of the read voltage to a third voltage level; and
adjusting the proportional parameter according to the first adjustment information, the first voltage level and the third voltage level.

### Claim 6 (depends on 5)

The read voltage control method of claim 5, wherein the step of adjusting the proportional parameter according to the first adjustment information, the first voltage level and the third voltage level comprises:
adjusting the proportional parameter according to a difference between the first voltage level and the third voltage level and the first adjustment information.

### Claim 7

A memory storage device, comprising:
a connection interface unit configured to couple to a host system;
a rewritable non-volatile memory module comprising a plurality of memory cells; and
a memory control circuit unit, coupled to the connection interface unit and the rewritable non-volatile memory module,
wherein the memory control circuit unit is configured to send a first read command sequence which instructs a reading of a plurality of first memory cells in the memory cells by using a first voltage level to obtain first data, wherein the first data is a total number of memory cells turned on by the first voltage level in the first memory cells,
the memory control circuit unit is further configured to determine a channel parameter according to curve information of a threshold voltage distribution of the first memory cells, wherein the curve information describes at least one of a curve endpoint, a curve type, a curve peak value and a curve slope of the threshold voltage distribution, and the threshold voltage distribution presents a number of memory cells each having a specific threshold voltage among the first memory cells;
the memory control circuit unit is further configured to obtain first adjustment information of a read voltage according to the first data and the channel parameter of the first memory cells, the channel parameter reflects a channel status of the first memory cells, and
the memory control circuit unit is further configured to adjust a voltage level of the read voltage from the first voltage level to a second voltage level according to the first adjustment information.

### Claim 8 (depends on 7)

The memory storage device of claim 7, wherein if the channel status of the first memory cells matches a first status, the memory control circuit unit is further configured to determine the channel status as a first parameter, and
if the channel status of the first memory cells matches a second status, the memory control circuit unit is further configured to determine the channel status as a second parameter,
wherein the first parameter is different from the second parameter.

### Claim 9 (depends on 7)

The memory storage device of claim 7, wherein the channel status of the first memory cells comprises a threshold voltage distribution status of the first memory cells.

### Claim 10 (depends on 7)

The memory storage device of claim 7, wherein the memory control circuit unit is further configured to adjust the first adjustment information of the read voltage according to a proportional parameter,
the memory control circuit unit is further configured to send a second read command sequence which instructs a reading of the first memory cells by using the second voltage level to obtain second data, and
the memory control circuit unit is further configured to adjust the proportional parameter according to the first data and the second data.

### Claim 11 (depends on 7)

The memory storage device of claim 7, wherein the memory control circuit unit is further configured to adjust the first adjustment information of the read voltage according to a proportional parameter,
after adjusting the voltage level of the read voltage to the second voltage level, the memory control circuit unit is further configured to adjust the voltage level of the read voltage to a third voltage level, and
the memory control circuit unit is further configured to adjust the proportional parameter according to the first adjustment information, the first voltage level and the third voltage level.

### Claim 12 (depends on 11)

The memory storage device of claim 11, wherein the operation of adjusting the proportional parameter according to the first adjustment information, the first voltage level and the third voltage level comprises:
adjusting the proportional parameter according to a difference between the first voltage level and the third voltage level and the first adjustment information.

### Claim 13

A memory control circuit unit for controlling a rewritable non-volatile memory module, the memory control circuit unit comprising:
a host interface, configured to couple to a host system,
a memory interface, configured to couple to a rewritable non-volatile memory module, wherein the rewritable non-volatile memory module comprises a plurality of memory cells; and
a memory management circuit, coupled to the host interface and the memory interface,
wherein the memory management circuit is configured to send a first read command sequence which instructs a reading of a plurality of first memory cells in the memory cells by using a first voltage level to obtain first data, wherein the first data is a total number of memory cells turned on by the first voltage level in the first memory cells,
the memory management circuit is further configured to determine a channel parameter according to curve information of a threshold voltage distribution of the first memory cells, wherein the curve information describes at least one of a curve endpoint, a curve type, a curve peak value and a curve slope of the threshold voltage distribution, and the threshold voltage distribution presents a number of memory cells each having a specific threshold voltage among the first memory cells;
the memory management circuit is further configured to obtain first adjustment information of a read voltage according to the first data and the channel parameter of the first memory cells, the channel parameter reflects a channel status of the first memory cells, and
the memory management circuit is further configured to adjust a voltage level of the read voltage from the first voltage level to a second voltage level according to the first adjustment information.

### Claim 14 (depends on 13)

The memory control circuit unit of claim 13, wherein if the channel status of the first memory cells matches a first status, the memory management circuit is further configured to determine the channel status as a first parameter, and
if the channel status of the first memory cells matches a second status, the memory management circuit is further configured to determine the channel status as a second parameter,
wherein the first parameter is different from the second parameter.

### Claim 15 (depends on 13)

The memory control circuit unit of claim 13, wherein the channel status of the first memory cells comprises a threshold voltage distribution status of the first memory cells.

### Claim 16 (depends on 13)

The memory control circuit unit of claim 13, wherein the memory management circuit is further configured to adjust the first adjustment information of the read voltage according to a proportional parameter,
the memory management circuit is further configured to send a second read command sequence which instructs a reading of the first memory cells by using the second voltage level to obtain second data, and
the memory management circuit is further configured to adjust the proportional parameter according to the first data and the second data.

### Claim 17 (depends on 13)

The memory control circuit unit of claim 13, wherein the memory management circuit is further configured to adjust the first adjustment information of the read voltage according to a proportional parameter,
after adjusting the voltage level of the read voltage to the second voltage level, the memory management circuit is further configured to adjust the voltage level of the read voltage to a third voltage level, and
the memory management circuit is further configured to adjust the proportional parameter according to the first adjustment information, the first voltage level and the third voltage level.

### Claim 18 (depends on 17)

The memory control circuit unit of claim 17, wherein the operation of adjusting the proportional parameter according to the first adjustment information, the first voltage level and the third voltage level comprises:
adjusting the proportional parameter according to a difference between the first voltage level and the third voltage level and the first adjustment information.