# US 12,008,181 B2 · Electronic device and control method thereof > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 12,008,181 B2 - Document ID: US12008181B2 - Status: Granted - Kind: B2 - Application number: 17/938,992 - Filed: 2022-09-07 - Published: 2023-07-27 - Granted: 2024-06-11 - Earliest claimed: 2022-01-24 - Assignees: AUO Corporation - Applicants: AUO Corporation - Inventors: Chia-Hsien Chu; Chun-Chi Lai; Ching-Sheng Cheng - Web page: https://patentgrep.com/patent/US12008181B2 ## CPC - G06F 3/0412: {Digitisers structurally integrated in a display} - G06F 1/24: Resetting means - G06F 1/3215: Monitoring of peripheral devices - G06F 1/3262: {Power saving in digitizer or tablet} - G06F 3/0416: {Control or interface arrangements specially adapted for digitisers} - H03K 19/20: characterised by logic function, e.g. AND, OR, NOR, NOT circuits (H03K19/003 - H03K19/01 take precedence) - Y02D 10/00: Energy efficient computing, e.g. low power processors, power management or thermal management - G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N) - H03K: PULSE TECHNIQUE (measuring pulse characteristics G01R; modulating sinusoidal oscillations with pulses H03C; transmission of digital information H04L; discriminator circuits detecting phase difference between two signals by counting or integrating cycles of oscillation H03D3/04; automatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses where the type of generator is irrelevant or unspecified H03L; coding, decoding or code conversion, in general H03M) - Y02D: CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE ## Abstract The disclosure provides an electronic device including a host control circuit, a display driving circuit, a touch driving circuit and a logic circuit. The host control circuit is configured to provide a first reset control signal. The display driving circuit is configured to reset according to the first reset control signal. The logic circuit is configured to generate a second reset control signal to the touch driving circuit according to the first reset control signal and an enable signal. During a sleep mode of the electronic device, the enable signal has a first logic level. In response to the enable signal at the first logic level, the logic circuit generates the second reset control signal at the first logic level. The touch driving circuit does not reset according to the second reset control signal at the first logic level. ## Claims ### Claim 1 An electronic device, comprising: a host control circuit, configured to provide a first reset control signal; a display driving circuit, configured to perform a reset operation according to the first reset control signal; a touch driving circuit; and a logic circuit, configured to generate a second reset control signal to the touch driving circuit according to the first reset control signal and an enable signal, wherein in a sleep mode, a rising edge of the first reset control signal triggers the display driving circuit to perform the reset operation, and in the sleep mode, the enable signal has a first logic level, in response to the enable signal being at the first logic level, the logic circuit generates the second reset control signal at the first logic level, and wherein the touch driving circuit does not reset according to the second reset control signal at the first logic level. ### Claim 2 (depends on 1) The electronic device of claim 1, wherein, in response to one of the first reset control signal and the enable signal being at the first logic level, the logic circuit outputs the second reset control signal at the first logic level. ### Claim 3 (depends on 2) The electronic device of claim 2, wherein, in response to both of the first reset control signal and the enable signal being at a second logic level, the logic circuit outputs the second reset control signal at the second logic level. ### Claim 4 (depends on 3) The electronic device of claim 3, wherein, in an active mode, the enable signal has the second logic level, in response to the enable signal being at the second logic level, the logic circuit generates the second reset control signal according to the first reset control signal. ### Claim 5 (depends on 4) The electronic device of claim 4, wherein: in the active mode, the display driving circuit is triggered to perform the reset operation according to signal edge of the first reset control signal; and in the active mode, the touch driving circuit is triggered according to signal edge of the second reset control signal. ### Claim 6 (depends on 1) The electronic device of claim 1, wherein the display driving circuit, the logic circuit and the touch driving circuit are disposed in a touch with display driver integration circuit. ### Claim 7 (depends on 6) The electronic device of claim 6, wherein the host control circuit comprises a pin, and wherein the host control circuit transmits the first reset control signal through the pin to the display driving circuit and the logic circuit. ### Claim 8 (depends on 1) The electronic device of claim 1, further comprising: a digital circuit, configured to generate the enable signal according to status value of operation mode of the electronic device. ### Claim 9 (depends on 1) The electronic device of claim 1, wherein the logic circuit comprises: a OR gate, wherein a first input terminal of the OR gate is configured to receive the first reset control signal, wherein a second input terminal of the OR gate is configured to receive the enable signal, and wherein an output terminal of the OR gate is configured to output the second reset control signal to the touch driving circuit. ### Claim 10 (depends on 1) The electronic device of claim 1, wherein the logic circuit comprises: a first NAND gate, wherein two input terminals of the first NAND gate are configured to receive the first reset control signal; a second NAND gate, wherein two input terminals of the second NAND gate are configured to receive the enable signal; and a third NAND gate, wherein a first input terminal of the third NAND gate is electrically coupled to an output terminal of the first NAND gate, wherein a second input terminal of the third NAND gate is electrically coupled to an output terminal of the second NAND gate, and wherein an output terminal of the third NAND gate is configured to output the second reset control signal to the touch driving circuit. ### Claim 11 (depends on 1) The electronic device of claim 1, wherein the logic circuit comprises: a first NOR gate, wherein a first input terminal of the first NOR gate is configured to receive the first reset control signal, wherein a second input terminal of the first NOR gate is configured to receive the enable signal; and a second NOR gate, wherein two input terminals of the second NOR gate are electrically coupled to an output terminal of the first NOR gate, and wherein an output terminal of the second NOR gate is configured to output the second reset control signal to the touch driving circuit. ### Claim 12 An electronic device, comprising: a host control circuit, configured to provide a first reset control signal; and a touch with display driver integration circuit, comprising: a display driving circuit, configured to perform reset operation according to the first reset control signal; a touch driving circuit; and a logic circuit, configured to generate a second reset control signal, according to the first reset control signal and an enable signal, to the touch driving circuit, wherein in a sleep mode of the electronic device, a rising edge of the first reset control signal triggers the display driving circuit to perform the reset operation, and in the sleep mode, the enable signal has a first logic level, wherein in response to the enable signal has the first logic level, the logic circuit generates the second reset control signal at the first logic level, and wherein the touch driving circuit does not reset according to the second reset control signal at the first logic level. ### Claim 13 A control method, comprising: providing a first reset control signal by a host control circuit; providing an enable signal by a digital circuit; in an active mode, generating and outputting a second reset control signal to a touch driving circuit, by a logic circuit, according to logic level of the first reset control signal, and resetting the logic circuit according to the second reset control signal corresponding to the logic level of the first reset control signal; in a sleep mode, triggering a display driving circuit to perform reset operation according to a rising edge of the first reset control signal; and in the sleep mode, generating and outputting the second reset control signal to the touch driving circuit, by the logic circuit, according to logic level of the enable signal. ### Claim 14 (depends on 13) The control method of claim 13, further comprising: in response to one of the first reset control signal and the enable signal being at a first logic level, outputting the second reset control signal at the first logic level by the logic circuit. ### Claim 15 (depends on 14) The control method of claim 14, wherein in the sleep mode, the enable signal has the first logic level, and wherein the control method further comprising: in response to the enable signal at the first logic level, generating the second reset control signal at the first logic level, by the logic circuit. ### Claim 16 (depends on 15) The control method of claim 15, further comprising: in the sleep mode, transmitting the second reset control signal at the first logic level to the touch driving circuit, by the logic circuit, to not reset the touch driving circuit. ### Claim 17 (depends on 14) The control method of claim 14, further comprising: in response to both of the first reset control signal and the enable signal being at a second logic level, outputting the second reset control signal at the second logic level by the logic circuit. ### Claim 18 (depends on 17) The control method of claim 17, wherein in the active mode, the enable signal has a second logic level, and wherein the control method further comprising: in response to the enable signal at the second logic level, generating the second reset control signal according to the first reset control signal, by the logic circuit. ### Claim 19 (depends on 18) The control method of claim 18, further comprising: in the active mode, triggering the touch driving circuit to perform reset operation according to signal edge of the second reset control signal. ### Claim 20 (depends on 13) The control method of claim 13, further comprising: in the active mode, triggering the display driving circuit to perform reset operation according to signal edge of the first reset control signal.