# US 12,007,930 B2 · Low voltage drive circuit with drive sense and methods for use therewith > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 12,007,930 B2 - Document ID: US12007930B2 - Status: Granted - Kind: B2 - Application number: 18/319,283 - Filed: 2023-05-17 - Published: 2023-09-14 - Granted: 2024-06-11 - Earliest claimed: 2019-01-14 - Assignees: Sigmasense, LLC. - Applicants: SigmaSense, LLC. - Inventors: Richard Stuart Seger, Jr.; Daniel Keith Van Ostrand; Gerald Dale Morrison; Timothy W. Markison - Web page: https://patentgrep.com/patent/US12007930B2 ## CPC - G06F 13/4072: {Drivers or receivers (G06F13/4086 takes precedence; for multistate logic circuits H03K19/0002)} - H03F 3/45475: {using IC blocks as the active amplifying circuit} - H04L 7/04: Speed or phase control by synchronisation signals {(H04L7/0075 takes precedence)} - H04L 12/40045: {Details regarding the feeding of energy to the node from the bus} - G06F 2213/0016: Inter-integrated circuit (I2C) - H03F 3/45: Differential amplifiers (differential sense amplifiers G11C7/062) - H04L 25/0282: {Provision for current-mode coupling} - G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N) - H03F: AMPLIFIERS - H04L: TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION (arrangements common to telegraphic and telephonic communication H04M) ## Abstract A low voltage drive circuit includes a transmit digital to analog circuit that converts transmit digital data into analog outbound data by: generating a DC component; generating a first oscillation at a first frequency; generating a second oscillation at the first frequency; and outputting the first oscillation or the second oscillation on a bit-by-bit basis in accordance with the transmit digital data to produce an oscillating component, wherein the DC component is combined with the oscillating component to produce the analog outbound data, and wherein the oscillating component and the DC component are combined to produce the analog outbound data. A drive sense circuit drives an analog transmit signal onto a bus, wherein the analog outbound data is represented within the analog transmit signal as variances in loading of the bus at the first frequency and wherein analog inbound data is represented within an analog receive signal as variances in loading of the bus at a second frequency. ## Claims ### Claim 1 A low voltage drive circuit (LVDC) comprises: a transmit digital to analog circuit configured to convert transmit digital data into analog outbound data by: generating an oscillating component, via an output limited digital to analog converter, wherein the oscillating component is generated in accordance with the transmit digital data as an oscillation within a first frequency range having oscillation characteristics, wherein magnitude of the oscillation is limited to a range that is less than a difference between magnitudes of power supply rails; and combining a DC component with the oscillating component to produce the analog outbound data; and a drive sense circuit configured to: convert the analog outbound data into an analog transmit signal; drive the analog transmit signal onto a bus, wherein the analog outbound data is represented within the analog transmit signal as variances in loading of the bus within the first frequency range; receive an analog receive signal from the bus by isolating the analog receive signal from the analog transmit signal; and recover analog inbound data from the analog receive signal as variances in loading of the bus within a second frequency range, wherein the first frequency range is different from the second frequency range. ### Claim 2 (depends on 1) The LVDC of claim 1 further comprises: a receive analog to digital circuit configured to convert the analog inbound data into received digital data in accordance with receive parameters. ### Claim 3 (depends on 2) The LVDC of claim 2, wherein the transmit digital to analog circuit converts the transmit digital data into the analog outbound data in accordance with transmit parameters. ### Claim 4 (depends on 2) The LVDC of claim 2 further comprises: a clock circuit configured to generate a receive clock signal and a transmit clock signal, wherein the transmit digital to analog circuit converts the transmit digital data into the analog outbound data in accordance with the transmit clock signal and wherein the receive analog to digital circuit converts the analog inbound data into the received digital data in accordance with the receive clock signal. ### Claim 5 (depends on 4) The LVDC of claim 4 further comprises: a controller configured to generate a clock control signal; wherein the clock circuit generates the receive clock signal and the transmit clock signal in accordance with the clock control signal. ### Claim 6 (depends on 1) The LVDC of claim 1, wherein the drive sense circuit comprises: a change detection circuit configured to generate the analog inbound data in response to the analog receive signal and the analog outbound data; a regulation circuit configured to generate a regulation signal in response to the analog inbound data; and a power source circuit configured to generate the analog transmit signal in response to the regulation signal. ### Claim 7 (depends on 6) The LVDC of claim 6, wherein the change detection circuit includes an operational amplifier or a comparator. ### Claim 8 (depends on 6) The LVDC of claim 6, wherein the power source circuit includes a regulated current source configured to generate the analog transmit signal in response to the regulation signal. ### Claim 9 (depends on 1) The LVDC of claim 1, wherein the oscillating characteristics include a first amplitude of the oscillation. ### Claim 10 (depends on 1) The LVDC of claim 1, wherein the oscillating characteristics include a first phase of the oscillation. ### Claim 11 A method comprises: converting, via a transmit digital to analog circuit, transmit digital data into analog outbound data by: generating an oscillating component, via an output limited digital to analog converter, wherein the oscillating component is generated in accordance with the transmit digital data as a oscillation within a first frequency range having oscillation characteristics, wherein magnitude of the oscillation is limited to a range that is less than a difference between magnitudes of power supply rails; and combining a DC component with the oscillating component to produce the analog outbound data; and converting, via a drive sense circuit, the analog outbound data into an analog transmit signal; driving, via the drive sense circuit, the analog transmit signal onto a bus, wherein the analog outbound data is represented within the analog transmit signal as variances in loading of the bus within the first frequency range; receiving an analog receive signal from the bus by isolating the analog receive signal from the analog transmit signal; and recovering analog inbound data from the analog receive signal as variances in loading of the bus in a second frequency range, wherein the first frequency range is different from the second frequency range. ### Claim 12 (depends on 11) The method of claim 11 further comprises: converting, via an receive analog to digital circuit, analog inbound data into received digital data in accordance with receive parameters. ### Claim 13 (depends on 12) The method of claim 12, wherein the transmit digital to analog circuit converts the transmit digital data into the analog outbound data in accordance with transmit parameters. ### Claim 14 (depends on 12) The method of claim 12, further comprises: generating, via a clock circuit, a receive clock signal and a transmit clock signal, wherein the transmit digital to analog circuit converts the transmit digital data into the analog outbound data in accordance with the transmit clock signal and wherein the receive analog to digital circuit converts the analog inbound data into the received digital data in accordance with the receive clock signal. ### Claim 15 (depends on 14) The method of claim 14 further comprises: generating a clock control signal; wherein the clock circuit generates the receive clock signal and the transmit clock signal in accordance with the clock control signal. ### Claim 16 (depends on 11) The method of claim 11, wherein the drive sense circuit comprises: a change detection circuit configured to generate the analog inbound data in response to the analog receive signal and the analog outbound data; a regulation circuit configured to generate a regulation signal in response to the analog inbound data; and a power source circuit configured to generate the analog transmit signal in response to the regulation signal. ### Claim 17 (depends on 16) The method of claim 16, wherein the change detection circuit includes an operational amplifier or a comparator. ### Claim 18 (depends on 16) The method of claim 16, wherein the power source circuit includes a regulated current source configured to generate the analog transmit signal in response to the regulation signal. ### Claim 19 (depends on 11) The method of claim 11, wherein the oscillating characteristics include a first amplitude of the oscillation. ### Claim 20 (depends on 11) The method of claim 11, wherein the oscillating characteristics include a first phase or phase of the oscillation.