# US 12,007,928 B2 · Signal bridging using an unpopulated processor interconnect

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- Number: US 12,007,928 B2
- Document ID: US12007928B2
- Status: Granted
- Kind: B2
- Application number: 18/322,183
- Filed: 2023-05-23
- Published: 2023-09-21
- Granted: 2024-06-11
- Earliest claimed: 2020-12-08
- Assignees: Advanced Micro Devices, Inc.
- Applicants: Advanced Micro Devices, Inc.
- Inventors: Jason R. Talbert
- Web page: https://patentgrep.com/patent/US12007928B2

## CPC

- G06F 13/4027: {using bus bridges (G06F13/4022 takes precedence)}
- G06F 13/4068: {Electrical coupling}
- G06F 13/20: for access to input/output bus
- G06F 9/4405: {Initialisation of multiprocessor systems}
- G06F 2213/40: Bus coupling
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)

## Abstract

Signal bridging using an unpopulated processor interconnect, including: communicatively coupling an apparatus to a plurality of first signal paths between a bootstrap processor (BSP) and a processor interconnect of a circuit board; communicatively coupling the apparatus to a plurality of second signal paths between the processor interconnect and a peripheral interface of the circuit board; and communicatively coupling the BSP to the peripheral interface via one or more third signal paths in the apparatus.

## Claims

### Claim 1

An apparatus for signal bridging comprising:
a first connection point configured to communicatively couple a bootstrap processor and a processor interconnect;
a second connection point configured to communicatively couple the processor interconnect and a peripheral interface;
a first signal path configured to communicatively couple the first connection point to the second connection point; and
a signal terminator coupled to a second signal path configured to communicatively couple to the bootstrap processor.

### Claim 2 (depends on 1)

The apparatus of claim 1, further comprising a memory storing data indicating a signaling protocol to be used by the bootstrap processor.

### Claim 3 (depends on 1)

The apparatus of claim 1, wherein the signal terminator comprises a passive terminator.

### Claim 4 (depends on 1)

The apparatus of claim 1, wherein the signal terminator comprises an active terminator.

### Claim 5 (depends on 1)

The apparatus of claim 1, wherein the signal terminator is configured to match a characteristic impedance of the second signal path.

### Claim 6 (depends on 1)

The apparatus of claim 1, wherein the apparatus comprises a circuit board.

### Claim 7 (depends on 1)

The apparatus of claim 1, wherein the first connection point and second connection point comprise mechanical and electrical coupling to the processor interconnect.

### Claim 8 (depends on 1)

The apparatus of claim 1, wherein the signal terminator comprises a loopback connection.

### Claim 9 (depends on 2)

The apparatus of claim 2, wherein the signaling protocol to be used by the bootstrap processor is dependent on a particular configuration of the signal terminator.

### Claim 10 (depends on 3)

The apparatus of claim 3, wherein the passive terminator comprises a resistor.

### Claim 11 (depends on 4)

The apparatus of claim 4, wherein the active terminator comprises a voltage regulator.

### Claim 12

A circuit board for signal bridging, the circuit board comprising:
a bootstrap processor;
a peripheral interface;
a processor interconnect; and
an apparatus comprising:
a first connection point configured to communicatively couple the bootstrap processor and the processor interconnect;
a second connection point configured to communicatively couple the processor interconnect and the peripheral interface;
a first signal path configured to communicatively couple the first connection point to the second connection point; and
a signal terminator coupled to a second signal path configured to communicatively couple to the bootstrap processor.

### Claim 13 (depends on 12)

The circuit board of claim 12, wherein the apparatus further comprises a memory storing data indicating a signaling protocol to be used by the bootstrap processor.

### Claim 14 (depends on 12)

The circuit board of claim 12, wherein the signal terminator is configured to match a characteristic impedance of the second signal path.

### Claim 15 (depends on 13)

The circuit board of claim 13, wherein the signaling protocol to be used by the bootstrap processor is dependent on a particular configuration of the signal terminator.

### Claim 16

A method of signal bridging, the method comprising:
communicatively coupling, using a first connection point of an apparatus, a bootstrap processor and a processor interconnect;
communicatively coupling, using a second connection point of the apparatus the processor interconnect and a peripheral interface;
communicatively coupling, using a first signal path of the apparatus, the first connection point to the second connection point; and
communicatively coupling a signal terminator of the apparatus to a second signal path configured to communicatively couple to the bootstrap processor.

### Claim 17 (depends on 16)

The method of claim 16, wherein the apparatus further comprises a memory storing data indicating a signaling protocol to be used by the bootstrap processor.

### Claim 18 (depends on 16)

The method of claim 16, wherein the signal terminator comprises a passive terminator.

### Claim 19 (depends on 16)

The method of claim 16, wherein the signal terminator comprises an active terminator.

### Claim 20 (depends on 17)

The method of claim 17, wherein the signaling protocol to be used by the bootstrap processor is dependent on a particular configuration of the signal terminator.
