Elastic resource management in a network switch

A method for managing access requests within an elastic memory system, the method comprises:

• receiving access requests by clients, the access requests are associated with input addresses;
• converting, by first address converters, the input addresses to intermediate addresses within a linear address space;
• converting, by address scramblers, the intermediate addresses to physical addresses while balancing a load between memory banks;
• receiving, by an interconnect, modified access requests that are associated with the physical addresses;
• wherein the elastic memory system is implemented within a single integrated circuit;
• wherein the interconnect is a crossbar;
• sending, by the interconnect, the modified access requests downstream;
• wherein the sending comprises sending atomic modified access requests to atomic operation units and sending the non-atomic modified access requests to the memory banks through bypass paths between the crossbar and the memory banks, the bypass paths bypass the atomic operation units;
• executing, by the atomic operations units, the atomic modified access requests;
• and
• responding, by the memory banks, to the atomic modified access requests and to non-atomic modified access requests;
• wherein the clients, the first address converters and the address scramblers are positioned on one side of the crossbar and the memory banks;
• and
• wherein the memory banks and the atomic operation units are positioned another side of the crossbar.

At least one non-transitory computer readable medium for managing access requests within a system, the at least one non-transitory computer readable medium stores instructions for:

• receiving access requests by clients, the access requests are associated with input addresses;
• converting, by first address converters, the input addresses to intermediate addresses within a linear address space;
• converting, by address scramblers, the intermediate addresses to physical addresses while balancing a load between memory banks;
• receiving, by an interconnect, modified access requests that are associated with the physical addresses;
• wherein the elastic memory system is implemented within a single integrated circuit;
• wherein the interconnect is a crossbar;
• sending, by the interconnect, the modified access requests downstream;
• wherein the sending comprises sending atomic modified access requests to atomic operation units and sending the non-atomic modified access requests to the memory banks through bypass paths between the crossbar and the memory banks, the bypass paths bypass the atomic operation units;
• executing, by the atomic operations units, the atomic modified access requests;
• and
• responding, by the memory banks, to the atomic modified access requests and to non-atomic modified access requests;
• wherein the clients, the first address converters and the address scramblers are positioned on one side of the crossbar and the memory banks;
• and
• wherein the memory banks and the atomic operation units are positioned another side of the crossbar.