Substrate and material characterisation method and device
AssigneeSony Semiconductor Solutions Corporation
InventorKamal Samanta
Life of this patent
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Abstract
A device comprises a planar substrate having conductive formations defining a substrate integrated waveguide test resonator; the test resonator comprising a three-dimensional region formed at least partly within the substrate having first and second planar conductive layers extending parallel to the plane of the substrate and one or more conductive sidewall formations perpendicular to the plane of the substrate defining a resonator side wall extending around the three-dimensional region; in which one of the first and second planar conductive layers comprises a test port comprising a conductive test connection electrically isolated from the rest of that planar conductive layer.
Claims18
A device, comprising:
- a planar substrate having conductive formations defining a substrate integrated waveguide test resonator, the test resonator comprising a three-dimensional region formed at least partly within the substrate having first and second planar conductive layers extending parallel to a plane of the substrate and one or more conductive sidewall formations perpendicular to the plane of the substrate defining a resonator side wall extending around the three-dimensional region,
- wherein one planar conductive layer of the first and second planar conductive layers includes a test port comprising a conductive test connection electrically isolated from a rest of the one planar conductive layer, and
- wherein the test port comprises an aperture formed in the one planar conductive layer, the conductive test connection being formed entirely within the aperture with a gap between the conductive test connection and the rest of the one planar conductive layer.
A signal processing device, comprising:
- a dielectric substrate including one or more signal processing components;
- and
- a test resonator formed at least partly within the dielectric substrate,
- wherein the substrate includes conductive formations defining a substrate integrated waveguide test resonator, the test resonator comprising a three-dimensional region formed at least partly within the substrate having first and second planar conductive lavers extending parallel to a plane of the substrate and one or more conductive sidewall formations perpendicular to the plane of the substrate defining a resonator side wall extending around the three-dimensional region,
- wherein one planar conductive layer of the first and second planar conductive layers includes a test port comprising a conductive test connection electrically isolated from a rest of the one planar conductive layer.
A method comprising:
- forming a test resonator in a planar substrate having conductive formations defining a substrate integrated waveguide test resonator, the test resonator comprising a three-dimensional region formed at least partly within the substrate having first and second planar conductive layers extending parallel to the plane of the substrate and one or more conductive sidewall formations perpendicular to the plane of the substrate defining a resonator side wall extending around the three-dimensional region;
- forming a test port in one of the first and second planar conductive layers, comprising a test port comprising a conductive test connection electrically isolated from the rest of that planar conductive layer;
- connecting a test device to the conductive test formation and to the one of the first and second planar conductive layers;
- exciting electromagnetic oscillation within the test resonator;
- and
- characterising one or more dielectric properties of the substrate by detecting one or more resonant properties of the test resonator.
Dependencies are inferred from the claim text.